F100K
Abstract: SY100S321 SY100S321FC SY100S321JC SY100S321JCTR
Text: LOW-POWER 9-BIT INVERTER FEATURES SY100S321 DESCRIPTION • Max. propagation delay of 700ps ■ IEE min. of –55mA ■ Extended supply voltage option: VEE = –4.2V to –5.5V ■ Voltage and temperature compensation for improved noise immunity ■ 70% faster than Fairchild 300K at lower power
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SY100S321
700ps
F100K
24-pin
28-pin
SY100S321
F24-1
SY100S321JC
J28-1
SY100S321JCTR
F100K
SY100S321FC
SY100S321JC
SY100S321JCTR
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Untitled
Abstract: No abstract text available
Text: IDT49FCT805/A FAST CMOS BUFFER/CLOCK DRIVER COMMERCIAL TEMPERATURE RANGE FAST CMOS BUFFER CLOCK/DRIVER DESCRIPTION: FEATURES: − − − − − − − − − − − IDT49FCT805/A 0.5 MICRON CMOS Technology Guaranteed low skew < 700ps max. Low duty cycle distortion < 1ns (max.)
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IDT49FCT805/A
700ps
-24mA
49FCT805/A
T49FCT
P20-1)
SO20-2)
SO20-7)
SO20-8)
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74FCT810T
Abstract: No abstract text available
Text: IDT74FCT810BT/CT FAST CMOS BUFFER/CLOCK DRIVER COMMERCIAL TEMPERATURE RANGE FAST CMOS BUFFER/CLOCK DRIVER IDT74FCT810BT/CT FEATURES: DESCRIPTION: • • • • • • • • 0.5 MICRON CMOS Technology Guaranteed low skew < 600ps max. Very low duty cycle distortion < 700ps (max.)
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IDT74FCT810BT/CT
600ps
700ps
-32mA
74FCT810T
810BT
810CT
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Untitled
Abstract: No abstract text available
Text: SY10E154 SY100E154 SY10E154 5-BIT 2:1 MUX-LATCH Micrel, Inc. FEATURES SY100E154 DESCRIPTION • ■ ■ ■ ■ ■ ■ 750ps max. LEN to output Extended 100E VEE range of –4.2V to –5.5V 700ps max. D to output Differential outputs Asynchronous Master Reset
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SY10E154
SY100E154
750ps
700ps
MC10E/100E154
28-pin
SY10/100E154
M9999-032006
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PL102-10TC-R
Abstract: PL102-10SC-R
Text: Low Skew Output Buffer FEATURES PIN CONFIGURATION • Frequency Range: − 15 to 170MHz @ 3.3V − 15 to 145MHz @ 2.5V Internal Phase Locked Loop Allows Spread Spectrum Modulation on Reference Clock to Pass to Outputs. Zero Input to Output Delay Less Than 700ps Device to Device Skew
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170MHz
145MHz
700ps
200ps
100ps
PL102-10
PL102-10TC-R
PL102-10SC-R
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F100K
Abstract: SY100S321 SY100S321FC SY100S321FCTR SY100S321JC
Text: LOW-POWER 9-BIT INVERTER Micrel, Inc. FEATURES DESCRIPTION • Max. propagation delay of 700ps ■ IEE min. of –55mA ■ Extended supply voltage option: VEE = –4.2V to –5.5V ■ Voltage and temperature compensation for improved noise immunity ■ 70% faster than Fairchild 300K at lower power
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Original
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PDF
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700ps
F100K
24-pin
28-pin
SY100S321
SY100S321
M9999-032206
F100K
SY100S321FC
SY100S321FCTR
SY100S321JC
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pd2a
Abstract: No abstract text available
Text: FAST CMOS BUFFER/CLOCK DRIVER IDT74FCT810BT/CT Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • • • • • • • • 0.5 MICRON CMOS technology Guaranteed low skew < 600ps max. Very low duty cycle distortion < 700ps (max.) Low CMOS power levels
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IDT74FCT810BT/CT
600ps
700ps
MIL-STD-883,
200pF,
74FCT810BT/CT
810BT
810CT
P20-1)
pd2a
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Untitled
Abstract: No abstract text available
Text: FAST CMOS BUFFER/CLOCK DRIVER IDT54/74FCT81OBT/CT Integrated Device Technology, Inc. FEATURES: • • 0.5 MICRON CM OS technology • Guaranteed low skew < 600ps max. packages Military product compliant to MIL-STD-883, Class B DESCRIPTION: • Very low duty cycle distortion < 700ps (max.)
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IDT54/74FCT81OBT/CT
600ps
MIL-STD-883,
700ps
200pF,
IDT54/74FCT81
810BT
IL-STD-883,
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Untitled
Abstract: No abstract text available
Text: * 5-BIT 2:1 MUX-LATCH SYNERGY SY10E154 SY100E154 SEMICONDUCTOR FEATURES DESCRIPTION • ■ ■ ■ ■ ■ ■ 750ps max. LEN to output 700ps max. D to output Differential outputs Asynchronous Master Reset Dual latch-enables ESD protection of 2000V Fully compatible with industry standard 10KH,
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SY10E154
SY100E154
750ps
700ps
MC10E/100E154
SY10E154
SY100E154
SY10E154JC
J28-1
SY100E154JC
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Untitled
Abstract: No abstract text available
Text: * SYNERG Y SY10E155 SY100E155 6-BIT2:1 MUX-LATCH SEMICONDUCTOR FEATURES 750ps max. LEN to output Extended 100E V ee range of -4.2V to -5.5V 700ps max. D to output Single-ended outputs Asynchronous Master Reset Dual latch-enables Fully compatible with industry standard 10KH,
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SY10E155
SY100E155
750ps
700ps
MC10E/100E155
28-pin
SY10/100E155
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Untitled
Abstract: No abstract text available
Text: * LOW-POWER 9-BIT INVERTER SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION Max. propagation delay of 700ps Ie e SY100S321 The SY100S321 is a monolithic 9-bit inverter. The device contains nine inverting buffer gates with single input and output. min. of -55m A
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700ps
SY100S321
SY100S321
F100K
SY100S321DC
D24-1
SY100S321FC
F24-1
SY100S321JC
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Untitled
Abstract: No abstract text available
Text: • Extended 100E V ee range of -4.2V to -5.5V ■ 700ps max. D to output ■ Differential outputs ■ Asynchronous Master Reset ■ Dual latch-enables ■ Fully compatible with industry standard 10KH, 100K ECL levels ■ Internal 75Ki2 input pulldown resistors
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750ps
700ps
75Ki2
MC10E/100E154
28-pin
SY10/100E154
SY10E154JC
SY10E154JCTR
SY100E154JC
SY100E154JCTR
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Untitled
Abstract: No abstract text available
Text: • < S Y N ER G Y TRIPLE DIFFERENTIAL Vr l û t « / ? 1 MULTIPLEXER v m O E -1 5 7 S E M IC O N D U C T O R DESCRIPTION FEATURES ■ Differential D and Q ■ Extended 100E V ee range of -4.2V to -5.5V ■ VBB output for single-ended use ■ 700ps max. propagation delay
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700ps
28-pin
SY10E457JC
SY10E457JCTR
SY100E457JC
SY100E457JCTR
J28-1
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Untitled
Abstract: No abstract text available
Text: * Q U IN T 2 IN P L P SYNERGY 00S302 O R 'N O R G A T E S E M IC O N D U C T O R FEATURES DESCRIPTION • Max. propagation delay of 700ps ■ Ie e tnin. of -45m A ■ Industry standard 100K ECL levels ■ Extended supply voltage option: Vee = -4.2V to -5.5V
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00S302
700ps
SY100S302
75KiJ
75KI1
F100K
10OS3O2DC
SY100S302FC
SY100S302JC
SY100S302JCTR
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Untitled
Abstract: No abstract text available
Text: * FEATURES DESCRIPTION Max. propagation delay of 700ps Ie e SY100S322 9-BIT BUFFER SYNERGY SEMICONDUCTOR The SY100S322 is an ultra-fast buffer designed for use in high-perform ance ECL system s. The device provides nine non-inverting buffers with single-ended outputs. The
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700ps
SY100S322
SY100S322
75Ki2
J28-1
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Untitled
Abstract: No abstract text available
Text: * 9-BIT BUFFER SYNERGY SY100S322 SEMICONDUCTOR DESCRIPTION FEATURES Max. propagation delay of 700ps Iee The SY100S322 is an ultra-fast buffer designed for use in high-perform ance ECL system s. The device provides nine non-inverting buffers w ith single-ended outputs. The
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SY100S322
700ps
SY100S322
75Ki2
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SY100E457
Abstract: SY100E457JC SY10E457 SY10E457JC SY10E457JCTR
Text: * TRIPLE DIFFERENTIAL 2:1 MULTIPLEXER SYNERGY S E M IC O N D U C T O R SY10E457 SY100E457 DESCRIPTION FEATURES • Differential D and Q ■ Extended 100E V ee range of -4.2V to -5.5V ■ V bb output for single-ended use ■ 700ps max. propagation delay ■ High frequency outputs
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SY10E457
SY100E457
700ps
SV10/100E457
SY10E457JC
J28-1
SY10E457JCTR
SY100E457JC
SY100E457JCTR
SY100E457
SY10E457
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SY100E150
Abstract: SY10E150 SY10E150JC SY10E150JCTR doom
Text: * SYNERGY 6-BIT D LATCH S E M IC O N D U C T O R FEATURES SY10E150 SY100E150 DESCRIPTION • 700ps max. propagation delay The SY10/100E150 are 6-bit D latches with differential outputs designed for use in new, high- performance ECL systems. When both Latch Enables LE N i, LEN 2 are at a
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SY10E150
SY100E150
700ps
MC10E/100E150
SY10/100E150
SY10E150JC
J28-1
SY10E150JCTR
SY100E150JC
SY100E150
doom
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Untitled
Abstract: No abstract text available
Text: * SY10E150 SY100E150 6-BIT D LATCH SYNERGY SEMICONDUCTOR FEATURES • ■ 700ps max. propagation delay DESCRIPTION The SY10/100E150 are 6-bit D latches with differential outputs designed fo r use in new, high- perform ance ECL system s. W hen both Latch Enables LE N 1, LEN 2 are at a
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SY10E150
SY100E150
700ps
MC10E/100E150
28-pin
SY10/100E150
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Untitled
Abstract: No abstract text available
Text: * SYNERGY SY10E155 SY100E155 6-BIT2:1 MUX-LATCH SEMICONDUCTOR FEATURES • 750ps max. LEN to output ■ Extended 100E V ee range of -4.2V to -5.5V ■ 700ps max. D to output ■ Single-ended outputs ■ Asynchronous Master Reset ■ Dual latch-enables ■ Fully compatible with industry standard 10KH,
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SY10E155
SY100E155
750ps
700ps
75Ki2
MC10E/100E155
28-pin
SY10/100E155
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Untitled
Abstract: No abstract text available
Text: * SYNERGY SEMICONDUCTOR QUINT 2-INPUT OR/NOR GATE DESCRIPTION FEATURES Max. propagation delay of 700ps Ie e SY100S302 The SY100S302 offers five 2-input O R/NO R gates designed for use in high-perform ance ECL system s. The five gates are controlled by a com m on Enable signal. All
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700ps
SY100S302
SY100S302
75Ki2
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Untitled
Abstract: No abstract text available
Text: * LOW-POWER 9-BIT INVERTER SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION Max. propagation delay of 700ps Ie e SY100S321 T he S Y 100S 321 is a m o n o lith ic 9 -b it in ve rte r. T he d e vice c o n ta in s nine in v e rtin g b u ffe r g a te s w ith s in g le in p u t and
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700ps
SY100S321
F100K
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Untitled
Abstract: No abstract text available
Text: * SYNERG Y SY10E155 SY100E155 6-BIT2:1 MUX-LATCH SEMICONDUCTOR FEATURES 750ps max. LEN to output Extended 100E V ee range of -4.2V to -5.5V 700ps max. D to output Single-ended outputs Asynchronous Master Reset Dual latch-enables Fully compatible with industry standard 10KH,
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OCR Scan
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PDF
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SY10E155
SY100E155
750ps
700ps
MC10E/100E155
28-pin
SY10/100E155
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Untitled
Abstract: No abstract text available
Text: « SYNERGY TRIPLE DIFFERENTIAL 2:1 MULTIPLEXER SY10E457 SY100E457 SEMICONDUCTOR DESCRIPTION FEATURES Differential D and Q Extended 100E Vee range of -4.2V to -5.5V VBB output for single-ended use 700ps max. propagation delay High frequency outputs Separate and common select
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SY10E457
SY100E457
700ps
28-pin
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