655MW Search Results

MAX9480

Abstract: MAX9480CUP MAX9481 MAX9482 28pin echo IC 3.3 Nippon capacitors
Contextual Info: 19-2539; Rev 1; 1/03 Low-Power, Low-Distortion, Central-Office ADSL Drivers and Integrated Drivers/Receivers Features ♦ Dissipate Only 655mW While Driving 20.4dBm ADSL Full-Rate DMT-Modulated Signal ♦ Operate with ±5.0V and ±2.5V Power Supplies ♦ Complete ADSL Central-Office Line Interface

Contextual Info: ADS54T01 www.ti.com SLAS918 – DECEMBER 2012 Single 12-Bit 750Msps Receiver and Feedback IC Check for Samples: ADS54T01 FEATURES 1 • • • • • • • • Single Channel 12-Bit Resolution Maximum Clock Rate: 750 Msps Low Swing Fullscale Input: 1.0 Vpp

Contextual Info: Q u a l it y S e m ic o n d u c t o r , I n c . Low Skew CMOS PLL Clock Driver With Integrated Loop Filter QS5919 ADVANCE INFORMATION FEATURES/BENEFITS DESCRIPTION • • • • • • • • • • • • The QS5919 Clock Driver uses an internal phase

Contextual Info: Low OS Q S5919T P>LL L C l o c k D r i v e r . . . _ q u a lity Semiconductor I nc S kew TTL W ith In te g ra te d Loop 1K, INFORMATION F ilte r FEATURES/BENEFITS DESCRIPTION • • • • • • • • • • • • The QS5919T Clock Driver uses an internal phase

Contextual Info: QS5919T Low Skew TTL PLL Clock Driver With Integrated Loop Filter Q uality Semiconductor, I nc. ADVANCE INFORMATION FEATURES/BENEFITS DESCRIPTION • • • • • • • • • • • • The QS5919T Clock Driver uses an internal phase locked loop PLL to lock low skew outputs to one of

Contextual Info: QS5919T Low Skew TTL PLL Clock Driver With Integrated Loop Filter Q u a l it y S e m ic o n d u c t o r , I n c . FEATURES/BENEFITS DESCRIPTION • • • • • • • • • • • • The QS5919T Clock Driver uses an internal phase locked loop PLL to lock low skew outputs to one of

MC88915

Abstract: QS5919T
Contextual Info: Low Skew TTL PLL >LL Clock Driver . . . With Integrated Loop Filter Q u a lit y Semiconductor, I nc. QS5919T 1M “ v* nce INFORMATION FEATURES/BENEFITS DESCRIPTION • • • • • • • • • • • • The QS5919T Clock Driver uses an internal phase

Contextual Info: DATA SHEET ICS8427-02 ICS8427-02 500MHZ, LOWIntegrated JITTER LVCMOS/CRYSTAL-TOCircuit Systems, Inc. SYNTHESIZER LVHSTL FREQUENCY 500MHZ, LOW JITTER LVCMOS/CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER GENERAL DESCRIPTION FEATURES The ICS8427-02 is a general purpose, six

QS5LV919

Abstract: MC88LV915
Contextual Info: & u a o R iN c 3.3V Low Skew CMOS PLL Clock Driver With Integrated Loop Filter q s s l v 919 in f o r m a t io n FEATURES/BENEFITS DESCRIPTION • • • • • • • • • • • • • The QS5LV919 Clock Driver uses an internal phase locked loop PLL to lock low skew outputs to one of

Contextual Info: ADS54T01 www.ti.com SLAS918A – DECEMBER 2012 – REVISED JANUARY 2014 Single 12-Bit 750Msps Receiver and Feedback IC Check for Samples: ADS54T01 FEATURES DESCRIPTION • • • • • • • • • • The ADS54T01 is a high linearity single channel 12bit, 750 MSPS analog-to-digital converter ADC

Contextual Info: fS] I nc 3.3V Low Skew CMOS PLL Clock Driver With Integrated Loop Fi Iter QS5LV919 DESCRIPTION FEATURES/BENEFITS JEDEC compatible LVTTL level Clock inputs are 5V tolerant < 300ps output skew, Q0-Q4 2xQ output, Q outputs, Q output, Q/2 output Outputs 3-state and reset while OE/RST low

QS5919T

Contextual Info: Low Skew TTL PLL Clock Driver OS I mcI uctor I nc qs5919t V W Ith I n t e g r a t e d L x w p F i l t e r FEATURES/BENEFITS DESCRIPTION • • • • • • • • • • • • The QS5919T Clock Driver uses an internal phase locked loop PLL to lock low skew outputs to one of

MC88915

Abstract: QS5919T
Contextual Info: QS5919T QS5919T Low Skew TTL PLL Clock Driver With Integrated Loop Filter Q QUALITY SEMICONDUCTOR, INC. FEATURES/BENEFITS DESCRIPTION • • • • • • • • • • • • The QS5919T Clock Driver uses an internal phase locked loop PLL to lock low skew outputs to one of

taiko relay TB1 160

Abstract: taiko relay TB1 - 160 taiko relay TB1 taiko TB1 taiko relay taiko tb1 160 TAIKO HTB1-160T taiko relay s-2405u taiko taiko relays
Contextual Info: GENERAL CATALOG AUTOMOTIVE RELAYS Notes and Guidelines Panasonic is part of a large worldwide group selling relays and associated switching products under different brand names in different territories. The conditions of use in some territories may differ

MC88915

Abstract: QS5919
Contextual Info: Q u a l it y S e m ic o n d u c t o r , I n c . Low Skew CM O S PLL Clock Driver With Integrated Loop Filter QS5919 ADVANCE INFORMATION FEATURES/BENEFITS DESCRIPTION • • • • • • • • • • • • The QS5919 Clock Driver uses an internal phase

DS75150

Contextual Info: ご注意：この日本語データシートは参考資料として提供しており内容が最新でない場合があります。 製品のご検討およびご採用に際しては、必ず最新の英文データシートをご確認ください。

Contextual Info: ICS8427-02 Integrated Circuit Systems, Inc. 500MHZ, LOW JITTER LVCMOS/CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER GENERAL DESCRIPTION FEATURES The ICS8427-02 is a general purpose, six ICS LVHSTL output high frequency synthesizer HiPerClockS and a member of the HiPerClock S™ family of

MAX9480

Abstract: MAX9480CUP MAX9481 MAX9482 Nippon capacitors
Contextual Info: 19-2539; Rev 0; 7/02 Low-Power, Low-Distortion, Central-Office ADSL Drivers and Integrated Drivers/Receivers Features The MAX9480/MAX9481/MAX9482 low-power, low-distortion, class-G, high-current asymmetric digital subscriber line ADSL drivers offer Rail-to-Rail output and

200MHZ

Abstract: 32-PIN ICS8427-02 MO-220 MS-026
Contextual Info: ICS8427-02 Integrated Circuit Systems, Inc. 500MHZ, LOW JITTER LVCMOS/CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER GENERAL DESCRIPTION FEATURES The ICS8427-02 is a general purpose, six ICS LVHSTL output high frequency synthesizer HiPerClockS and a member of the HiPerClock S™ family of

267MHz

Abstract: ICS8427DY-02 MO-220 MS-026 200MHZ 32-PIN ICS8427-02 Frequency Generator 500MHz
Contextual Info: ICS8427-02 500MHZ, LOW JITTER LVCMOS/CRYSTALTO-LVHSTL FREQUENCY SYNTHESIZER GENERAL DESCRIPTION FEATURES The ICS8427-02 is a general purpose, six LVHSTL ICS output high frequency synthesizer and a member HiPerClockS of the HiPerClockS™ family of High Performance

Contextual Info: DS75150 NATL SEMICOND MEMORY bflE D • b S D U S b DDbT037 ‘Ufi M N S C 3 National Semiconductor DS75150 Dual Line Driver General Description Features The DS75150 is a dual monolithic line driver designed to satisfy the requirements of the standard interface between

MAX9480

Abstract: MAX9481 MAX9482 Nippon capacitors
Contextual Info: 19-2539; Rev 2; 9/05 Low-Power, Low-Distortion, Central-Office ADSL Drivers and Integrated Drivers/Receivers Features The MAX9480/MAX9481/MAX9482 low-power, low-distortion, class-G, high-current asymmetric digital subscriber line ADSL drivers offer Rail-to-Rail output and

Contextual Info: 5 s iconducior , in c . 3.3V Low Skew CMOS PLL Clock Driver With Integrated Loop Filter q s s l v 919 in f o r m a t io n FEATURES/BENEFITS DESCRIPTION • • • • • • • • • • • • • The QS5LV919 Clock Driver uses an internal phase

Contextual Info: 500MHZ, LOW JITTER LVCMOS/CRYSTALTO-LVHSTL FREQUENCY SYNTHESIZER ICS8427-02 GENERAL DESCRIPTION FEATURES The ICS8427-02 is a general purpose, six LVHSTL ICS output high frequency synthesizer and a member HiPerClockS of the HiPerClockS™ family of High Performance