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    64X36 Search Results

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    Molex 1202550042

    Safety Light Curtains Side Mnt for YBBS YBES Light Curt
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    TTI 1202550042 Bulk 10 1
    • 1 $72.61
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    64X36 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    723653

    Abstract: 72V7290 72V3613 72V7250 72V3611 72V3623 72V72100 72V7230 72V7240 72V7260
    Text: Selector Guide for FIFO Memory Products • Synchronous FIFOs SuperSync II, SuperSync™ SyncFIFO™, DualSync™ • Bi-Directional Synchronous FIFOs • Asynchronous FIFOs the leading provider of FIFO memories. July’00 IDT FIFO Memory Products Quick Reference Guide


    Original     		PDF 512-bit 16K-bit 64K-bit 128K-bit 256K-bit 512K-bit 100MHz 133MHz 723653 72V7290 72V3613 72V7250 72V3611 72V3623 72V72100 72V7230 72V7240 72V7260

    te0509

    Abstract: 7253X
    Text: 7A ug us t, 20 05 09 :4 7: 19 PM PM7389 FREEDM 84A1024 Data Sheet Released ed ne sd ay ,1 FREEDM -84A1024 DATA SHEET Released Issue 4: March 2003 Do wn lo ad ed by Co nt e nt Te a m of Pa rtm in er In co n W Frame Engine and Datalink Manager 84A1024 Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use


    Original     		PDF PM7389 84A1024 PMC-2000689, 84A1024 FREEDMTM-84A1024 PMC-2000689 31x31 te0509 7253X

    EZR0

    Abstract: SRAM SAMSUNG
    Text: FREEDM -336A1024 PRELIMINARY DATA SHEET ISSUE 9 FRAME ENGINE AND DATA LINK MANAGER 336A1024 19 Ju ly, 20 02 11 :26 :56 AM PMC-1991476 ies Inc on Fr ida y, FREEDM™-336A1024 DATA SHEET PROPRIETARY AND CONFIDENTIAL PRELIMINARY ISSUE 9: MAY, 2002 Do wn loa


    Original     		PDF PMC-1991476 FREEDMTM-336A1024 336A1024 EZR0 SRAM SAMSUNG

    723653

    Abstract: BI 7284 72V7250 72V72100 72V7230 72V7240 72V7260 72V7270 72V7280 72V7290
    Text: Selector Guide for FIFO Memory Products • Synchronous FIFOs SuperSync II, SuperSync™ SyncFIFO™, DualSync™ • Bi-Directional Synchronous FIFOs • Asynchronous FIFOs the leading provider of FIFO memories. Jan’00 IDT FIFO Memory Products Quick Reference Guide


    Original     		PDF 512-bit 16K-bit 64K-bit 128K-bit 512K-bit 7236x3/72V36x3 723653 BI 7284 72V7250 72V72100 72V7230 72V7240 72V7260 72V7270 72V7280 72V7290

    AFE8405

    Abstract: AFE8405IZDQ CDMA2000-1X
    Text: AFE8405 14-BIT, 85-MSPS, SINGLE-ADC, 8-CHANNEL WIDEBAND RECEIVER www.ti.com SLWS212 – OCTOBER 2008 1 Introduction 1.1 FEATURES • • • • • • • • 14-Bit 85-MSPS High-Performance Single ADC At fin = 140 MHz, SNR ≥ 71 dBFS, SFDR ≥ 79 dBc At fin = 70 MHz, SNR ≥ 73 dBFS,


    Original     		PDF AFE8405 14-BIT, 85-MSPS, SLWS212 14-Bit 85-MSPS 18-Bit AFE8405 AFE8405IZDQ CDMA2000-1X

    CY7C4205

    Abstract: CY7C4215 CY7C4225 CY7C4235 CY7C4245 CY7C42X5 CY7C4425
    Text: fax id: 5410 1CY 7C42 25 CY7C4425/4205/4215 CY7C4225/4235/4245 64, 256, 512, 1K, 2K, 4K x 18 Synchronous FIFOs Features • High-speed, low-power, first-in first-out FIFO memories • 64 x 18 (CY7C4425) • 256 x 18 (CY7C4205) • 512 x 18 (CY7C4215) • 1K x 18 (CY7C4225)


    Original     		PDF CY7C4425/4205/4215 CY7C4225/4235/4245 CY7C4425) CY7C4205) CY7C4215) CY7C4225) CY7C4235) CY7C4245) 100-MHz CY7C4205 CY7C4215 CY7C4225 CY7C4235 CY7C4245 CY7C42X5 CY7C4425

    GC5018

    Abstract: SLWS169 34166 0X13 GC5018IZDL GC5316 44446
    Text: GC5018 8-CHANNEL WIDEBAND RECEIVER www.ti.com SLWS169A – MAY 2005 – REVISED NOVEMBER 2005 1 Introduction 1.1 • • • • • FEATURES Four 16-Bit CMOS ADC Input Ports Programmable Closed Loop VGA Control With 6-Bit Outputs for Each ADC Input Port Provide Received Total Wide Band Power


    Original     		PDF GC5018 SLWS169A 16-Bit GC5018 SLWS169 34166 0X13 GC5018IZDL GC5316 44446

    diode code GW 17

    Abstract: AFE8406IZDQ b0107 Video sync splitter vga AFE8406 CDMA2000-1X FIFO181 BGA484
    Text: AFE8406 14-BIT, 85 MSPS DUAL ADC, 8-CHANNEL WIDEBAND RECEIVER www.ti.com SLWS168C – MAY 2005 – REVISED OCTOBER 2008 1 Introduction 1.1 FEATURES • • • • • • • • • 14-Bit 85-MSPS High-Performance Dual ADC Dual ADC Can Be Configured Into Single ADC


    Original     		PDF AFE8406 14-BIT, SLWS168C 14-Bit 85-MSPS 18-Bit diode code GW 17 AFE8406IZDQ b0107 Video sync splitter vga AFE8406 CDMA2000-1X FIFO181 BGA484

    Untitled

    Abstract: No abstract text available
    Text: FREEDM -336A1024 PRELIMINARY DATASHEET ISSUE 11 FRAME ENGINE AND DATA LINK MANAGER 336A1024 ce m be r, 20 02 01 :5 5: 39 PM PMC-1991476 Tu es da y, 03 De FREEDM™-336A1024 DATASHEET PROPRIETARY AND CONFIDENTIAL PRELIMINARY ISSUE 11: NOVEMBER 2002 Do wn


    Original     		PDF -336A1024 336A1024 PMC-1991476 IncPMC-1991476

    Untitled

    Abstract: No abstract text available
    Text: CMOS Clocked FIFO With Bus Matching and Byte Swapping IDT723613 64x36 Integrated Device Technology, Inc. FEATURES: • Free-running CLKA and CLKB may be asynchronous or coincident permits simultaneous reading and writing of data on a single clock edge • 64 x 36 storage capacity FIFO buffering data from Port A


    OCR Scan     		PDF IDT723613 64x36 36-bits 18-bits 00S742b IDT723613 PN120-1) PQ132-1) 3145drw21

    Untitled

    Abstract: No abstract text available
    Text: CMOS SyncFIFO IDT723611 64x36 Integrated Device Technology, Inc. FEATURES: • Free-running CLKA and CLKB may be asynchronous or coincident permits simultaneous reading and writing of data on a single clock edge • 64 x 36 storage capacity • Synchronous data buffering from Port A to Port B


    OCR Scan     		PDF IDT723611 64x36 0020n3 IDT723611 0020n4

    Untitled

    Abstract: No abstract text available
    Text: Integrated Device Technology, Inc. 3.3 VOLT CMOS CLOCKED FIFO WITH BUS-MATCHING AND BYTE SWAPPING 64x36 FEATURES: • 64 x 36 storage capacity FIFO buffering data from Port A to Port B • Supports clock frequencies up to 67MHz • Fast access times of 10ns


    OCR Scan     		PDF 64x36 67MHz PN120-1) PQ132-1)

    Untitled

    Abstract: No abstract text available
    Text: 3.3 VOLT CMOS SyncFlFO 64x36 PRELIMINARY IDT72V3611 Integrated Device Technology, Inc. FEATURES: • • • • • • • • • • • • Parity G eneration can be selected for each Port • A vailable in 132-pin Plastic Q uad Flatpack PQF or space-saving 120-pin Thin Q uad Flatpack (PF)


    OCR Scan     		PDF 64x36 IDT72V3611 132-pin 120-pin T723611 727-S11* 492-M

    Untitled

    Abstract: No abstract text available
    Text: BiCMOSCIocked FIFO 64x36 IDT723611 In tegrated Device Technology, Inc. FEATURES: • Free-running CLKA and CLKB may be asynchronous or coincident permits simultaneous reading and writing of data on a single clock edge • 64 x 36 storage capacity • Synchronous data buffering from Port A to Port B


    OCR Scan     		PDF 64x36 IDT723611 IDT723611 SS771 01b7c

    B1494

    Abstract: b1099 BL-5B
    Text: BiCMOSCIocked FIFO 64x36 FEATURES: • Free-running CLKA and CLKB may be asynchronous or coincident permits simultaneous reading and writing of data on a single clock edge • 64 x 36 storage capacity • Synchronous data buffering from Port A to Port B


    OCR Scan     		PDF 64x36 IDT723611 67MHz 132-pin IDT723611 B1494 b1099 BL-5B

    Untitled

    Abstract: No abstract text available
    Text: CMOS SyncFlFO 64x36 IDT723611 Integrated Device Technology, Inc. FEATURES: • Free-running CLKA and CLKB may be asynchronous or coincident permits simultaneous reading and writing of data on a single clock edge • 64 x 36 storage capacity • Synchronous data buffering from Port A to Port B


    OCR Scan     		PDF 64x36 IDT723611 ID0273bfl IDT723611 3024drw

    Untitled

    Abstract: No abstract text available
    Text: CMOS Clocked FIFO PRELIMINARY With Bus Matching and Byte Swapping IDT723613 64x36 Integrated D evice Technology, Inc. FEATURES: • Free-running CLKA and CLKB may be asynchronous or coincident permits simultaneous reading and writing of data on a single clock edge


    OCR Scan     		PDF IDT723613 64x36 36-bits 18-bits T723613

    sf 127d

    Abstract: 127D IC51-1324-828 SN74ABT3611 D103E
    Text: SN74ABT3611 64 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCBS127D - JULY 1992 - REVISED SEPTEMBER 1995 Free-Running CLKA and CLKB Can Be Asynchronous or Coincident 64 x 36 Clocked FIFO Buffering Data From Port A to Port B Mailbox-Bypass Register In Each Direction


    OCR Scan     		PDF SN74ABT3611 SCBS127D 120-Pin 132-Pin Q103E1S sf 127d 127D IC51-1324-828 D103E

    Untitled

    Abstract: No abstract text available
    Text: 3.3 VOLT CMOS CLOCKED FIFO WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36 • Passive parity checking on each Port • Parity Generation can be selected for each Port • Available in 132-pin plastic quad flat package PQF , or space saving 120-pin thin quad flat package (TQFP)


    OCR Scan     		PDF 132-pin 120-pin IDT723613 IDT72V3613 83MHz com/docs/PSC4036 com/docs/PSC4021

    flatpack 48 v

    Abstract: TQFP 14X14 NG A65 oasi CY7C4205 CY7C4215 CY7C4225 CY7C4235 CY7C4245 CY7C42X5
    Text: fax id: 5410 CY7C4425/4205/4215 CY7C4225/4235/4245 W CYPRESS 64, 256, 512, 1K , 2K, 4K x 18 Synchronous FIFOs Features • High-speed, low-power, first-in first-out FIFO memories • 64 x 18 (CY7C4425) • 256 x 18 (CY7C4205) • 512 x 18 (CY7C4215) • 1 K x 18 (CY7C4225)


    OCR Scan     		PDF CY7C4425/4205/4215 CY7C4225/4235/4245 CY7C4425) CY7C4205) CY7C4215) CY7C4225) CY7C4235) CY7C4245) 100-MHz flatpack 48 v TQFP 14X14 NG A65 oasi CY7C4205 CY7C4215 CY7C4225 CY7C4235 CY7C4245 CY7C42X5

    T3611

    Abstract: No abstract text available
    Text: C L O C K E D FI RST- 1 S N 7 4 A B T3611 64 x 3 6 FIRST-OUT M E M O R Y SCBS127D-JULY 1992 - REVISED SEPTEMBER 1995 F r e e - R u n n i n g C L K A and C L K B Can Be E m p t y Flag EF and A l m o s t - E m p t y A s y n c h r o n o u s or C o i n c i d e n t


    OCR Scan     		PDF T3611 SCBS127D-JULY

    cmc tpm 16

    Abstract: No abstract text available
    Text: CMOS Clocked FIFO With Bus Matching and Byte Swapping Integrated Device Technology, Inc. IDT723613 6 4 x 3 6 FEATURES: • Free-running C LKA and CLKB may be asynchronous or coincident perm its sim ultaneous reading and w riting of data on a single clock edge


    OCR Scan     		PDF 36-bits 18-bits 727-S11* 492-M cmc tpm 16

    C4425

    Abstract: No abstract text available
    Text: fax id: 5410 CY7C4425/4205/4215 CY7C4225/4235/4245 64, 256, 512, 1K , 2K, 4K x 18 Synchronous FIFOs F e a tu re s • High-speed, low-power, first-in first-out FIFO memories • 64 x 18 (CY7C4425) • 256 x 18 (CY7C4205) . 512 x 18 (CY7C4215) • 1 K x 18 (CY7C4225)


    OCR Scan     		PDF CY7C4425/4205/4215 CY7C4225/4235/4245 CY7C4425) CY7C4205) CY7C4215) CY7C4225) CY7C4235) CY7C4245) 100-MHz C4425

    Untitled

    Abstract: No abstract text available
    Text: Order this data sheet by H4C/D MOTOROLA H SEMICONDUCTOR “ TECHNICAL DATA Advance Information H4C SERIES CMOS ARRAYS and the CDA™ ARCHITECTURE H IG H P ER FO R M A NC E T R IP L E LAYER M ETAL S U B -M IC R O N CMOS ARRAYS The s u b -m ic ro n H 4C S e rie s ’ " CM OS gate array fa m ily and th e new


    OCR Scan     		PDF