64K TTL STATIC RAM Search Results

EDI8808CB

Abstract: C323 64K 8KX8 CMOS SRAM sram 8kx8
Contextual Info: ^EDI _ EDI8808CB E le ctro n ic D « d g ru Inc. High Speed, Low Power 64K Monolithic SRAM 8Kx8 Static RAM CMOS, High Speed Monolithic Features The EDI8808CB is a 65,536bit, high speed CMOS 64K bit CMOS Static Static RAM organized as 8Kx8. Ali inputs and outputs are TTL compatible and allow

54HCT138

Contextual Info: D D C MEM-84000 ILC DATA DEVICE CORPORATION_ 64K x 16 STATIC RAM FEATURES DESCRIPTION The MEM-84000 is a 64K x 16 static RAM organized as four 32K x 8 blocks. Features of this hybrid include TTL com­ patible inputs and outputs, external or internal decoding, and operation over

Contextual Info: d Td Tc MEM-84000 ILC DATA DEVICE CORPORATION_ 64K x 16 STATIC RAM FEATURES DESCRIPTION The MEM-84000 is a 64K x 16 static RAM organized as four 32K x 8 blocks. Features of this hybrid include TTL com­ patible inputs and outputs, external or internal decoding, and operation over

Contextual Info: rï D DC MEM-84000 ILC DATA DEVICE CORPORATION_ 64K x 16 STATIC RAM FEATURES DESCRIPTION The MEM-84000 is a 64K x 16 static RAM organized as four 32K x 8 blocks. Features of this hybrid include TTL com­ patible inputs and outputs, external or internal decoding, and operation over

Contextual Info: ri •S- D D C i MEM-84000 ILC DATA DEVICE CORPORATION_ 64K x 16 STATIC RAM FEATURES APPRO X. Vz ACTUAL S IZE DESCRIPTION The M E M -84 00 0 is a 64K x 16 static RAM organized as four 32K x 8 blocks. Features of this hybrid include TTL com­ patible inputs and outputs, external or

k3570

Abstract: V62C31161024
Contextual Info: PRELIMINARY INFORMATION V62C31161024 64K x 16 STATIC RAM MOSEL VITELIC Features Description • High-speed: 35, 70 ns ■ Ultra low DC operating current of 4mA max. – TTL Standby: 0.5 mA (Max.) – CMOS Standby: 10 µA (Max.) ■ Fully static operation

S2564RL

Abstract: S2564RLF
Contextual Info: S-2564RL 64K-bit CMOS static RAM The S-2564R is a 8192-word x 8-bit CM OS static RAM. It is com posed of 4 transistors and 2 resisters, and operates completely static. All inputs and outputs can interface directly with TTL data bus. Features Low power consumption

P4C1258

Abstract: P4C1258L
Contextual Info: P4C1258/P4C12581ULTRA HIGH SPEED 64K x 4 STATIC CMOS RAMS SCRAMS FEATURES Three-State Outputs • High Speed (Equal Access and Cycle Times) - 20/25/30/35 ns (Commercial) - 25/30/35/45/55 ns (Military) TTL/CMOS Compatible Outputs Fully TTL Compatible Inputs

P4C1258

Contextual Info: P4C1258 ULTRA HIGH SPEED 64K x 4 STATIC CMOS RAM FEATURES Full CMOS, 6T Cell Three-State Outputs High Speed Equal Access and Cycle Times – 15/20/25/35 ns (Commercial/Industrial) TTL/CMOS Compatible Outputs Fully TTL Compatible Inputs Low Power Standard Pinout (JEDEC Approved)

Contextual Info: P4C1258 ULTRA HIGH SPEED 64K x 4 STATIC CMOS RAM FEATURES Full CMOS, 6T Cell Three-State Outputs High Speed Equal Access and Cycle Times – 15/20/25/35 ns (Commercial/Industrial) TTL/CMOS Compatible Outputs Fully TTL Compatible Inputs Low Power Standard Pinout (JEDEC Approved)

Contextual Info: P4C1258 ULTRA HIGH SPEED 64K x 4 STATIC CMOS RAM FEATURES Full CMOS, 6T Cell Three-State Outputs High Speed Equal Access and Cycle Times – 15/20/25/35 ns (Commercial/Industrial) TTL/CMOS Compatible Outputs Fully TTL Compatible Inputs Low Power Standard Pinout (JEDEC Approved)

Ci 6287

Contextual Info: 64K x 1 CMOS STATIC RAM CT M 0SeL ms 6287 July 1986 FEATURES DESCRIPTION • High-speed— 35/45/55/70ns • Low Power dissipation 250mW Typ. Operating IOOjiW (Typ.) Standby • Single 5V power supply • Fully static operation • Input and oulpui directly TTL compatible

7414e

Contextual Info: Prelibine:”/ CMOS SRAM KM6161002B/BL, KM6161002BI/BLI 64K x 16 Bit High-Speed CMOS Static RAM FEATURES GENERAL DESCRIPTION •• Fast Access Time 8,10,12» « Max. - Low Power Dissipation Standby (TTL) : 30* • (Max.) The KM6161002B/BL is a 1,048,576-bit high-speed Static Ran­

A314J

Abstract: lm516 lm5168
Contextual Info: LH5168/H FEATURES CMOS 64K 8K x 8 Static RAM PIN CONNECTIONS • 8,192 x 8 bit organization • Access times: 80/100 ns (MAX.) Fully-Static operation • Three-state outputs • Single +5 V power supply • TTL compatible I/O • Wide temperature range available

V61C51161024

Contextual Info: MOSEL VITELIC PRELIMINARY V61C51161024 64K x 16 HIGH SPEED STATIC RAM Features Description • ■ ■ ■ ■ ■ The V61C51161024 is a 1,048,576-bit static random-access memory organized as 65,536 words by 16 bits. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with

Contextual Info: MOSEL VITELIC PRELIMINARY INFORMATION V62C31161024 64K x 16 STA TIC RAM Features Description • High-speed: 35, 70 ns ■ Ultra low DC operating current of 4mA max. - TTL Standby: 0.5 mA (Max.) - CMOS Standby: 10 [xA (Max.) ■ Fully static operation ■ All inputs and outputs directly TTL compatible

Contextual Info: P re 'ir'irc í-y KM 616V1002B/BL, KM616V1002BI/BLI CMOS SRAM 64K x 16 Bit High-Speed CMOS Static RAM 3 ,3V Operating FEATURES GENERAL DESCRIPTION Fast Access Time 8,10,12* • (Max.) . Low Power Dissipation Standby (TTL) : 30« • (Max.) The KM616V1002B/BL is a 1,048,576-bit high-speed Static

DA72

Abstract: D-A72
Contextual Info: LH52253 FEATURES • Fast Access Times: 17/20/25/35 ns • Low-Power Standby when Deselected • TTL Compatible I/O • 5 V ± 10% Supply • Fully-Static Operation CMOS 64K x 4 Static RAM The LH52253 offers an Output Enable G for use in managing the Data Bus. Bus contention_during Write

LH52252A

Contextual Info: CMOS 64K x 4 Static RAM FEATURES • Fast Access Times: 25/35/45 ns • Standard 24-Pin, 300-mil DIP • Space Saving 24-Pin, 300-mil SOJ • JEDEC Standard Pinouts • Low Power Standby When Deselected • TTL Compatible I/O • 5 V ± 10% Supply • Fully Static Operation

Contextual Info: LH52253 FEATURES • Fast Access Times: 17/20/25/35 ns • Low-Power Standby when Deselected • TTL Compatible I/O • 5 V + 10% Supply • Fully-Static Operation CMOS 64K x 4 Static RAM The LH52253 offers an Output Enable G for use in managing the Data Bus. Bus contention during Write

DBLL

Contextual Info: IS62WV6416DALL/DBLL IS65WV6416DALL/DBLL 64K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM FEATURES • High-speed access time: 35ns, 45ns, 55ns • CMOS low power operation: 15 mW typical operating 1.5 µW (typical) CMOS standby • TTL compatible interface levels

IS64LV6416AL

Contextual Info: ISSI IS64LV6416AL 64K x 16 HIGH-SPEED CMOS STATIC RAM PRELIMINARY INFORMATION APRIL 2003 FEATURES • High-speed access time: 20 ns, 25ns • CMOS low power operation: 38 mW typical operating 10 µW (typical) standby • TTL compatible interface levels

IS62WV6416DBLL-45TLI

Abstract: IS62WV6416DALL-55BLI IS62WV6416DBLL-45BLI 45TLA
Contextual Info: IS62WV6416DALL/DBLL IS65WV6416DALL/DBLL 64K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM FEATURES • High-speed access time: 35ns, 45ns, 55ns • CMOS low power operation: 15 mW typical operating 1.5 µW (typical) CMOS standby • TTL compatible interface levels

Contextual Info: LH52253 FEATURES • Fast Access Times: 17/20/25/35 ns • Low-Power Standby when Deselected • TTL Compatible I/O • 5 V ± 10% Supply • Fully-Static Operation CMOS 64K X 4 Static RAM The LH52253 offers an Output Enable G for use in managing the Data Bus. Bus contention jluring Write