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    64 FTO Search Results

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    HT1621 SSOP

    Abstract: HT1621 ht1621b HT1621D HT1621B-48 HT1620 HT1622 HT16220 HT1623 HT1625
    Text: HT1621 RAM Mapping 32x4 LCD Controller for I/O µC LCD Product Line Selection Table HT1620 HT1621 HT1622 HT16220 HT1623 HT1625 HT1626 HT1627 HT16270 COM 4 4 8 8 8 8 16 16 16 SEG 32 32 32 32 48 64 48 64 64 √ √ √ √ √ √ Built-in Osc. Crystal Osc.


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    PDF HT1621 HT1620 HT1621 HT1622 HT16220 HT1623 HT1625 HT1626 HT1627 HT16270 HT1621 SSOP ht1621b HT1621D HT1621B-48

    HT1622

    Abstract: HT1621 1 wire 7 segment lcd controller HT1620 HT16220 HT1623 HT1625 HT1626 HT1627 HT16270
    Text: HT1620 RAM Mapping 32x4 LCD Controller for I/O µC LCD Product Line Selection Table HT1620 HT1621 HT1622 HT16220 HT1623 HT1625 HT1626 HT1627 HT16270 COM 4 4 8 8 8 8 16 16 16 SEG 32 32 32 32 48 64 48 64 64 √ √ √ √ √ √ Built-in Osc. Crystal Osc.


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    PDF HT1620 HT1620 HT1621 HT1622 HT16220 HT1623 HT1625 HT1626 HT1627 HT16270 1 wire 7 segment lcd controller HT16270

    Untitled

    Abstract: No abstract text available
    Text: ispLSI 2064E In-System Programmable SuperFAST High Density PLD Features Functional Block Diagram • SuperFAST HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC — 2000 PLD Gates — 64 I/O Pins, Four Dedicated Inputs — 64 Registers — High Speed Global Interconnect


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    PDF 2064E 00-Pin 766A-2064E 0212/2064E 2064E 2064E-200LT100 100-Pin 2064E-135LT100

    isp2064

    Abstract: No abstract text available
    Text: ispLSI 2064E In-System Programmable SuperFAST High Density PLD Features Functional Block Diagram • SuperFAST HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC — 2000 PLD Gates — 64 I/O Pins, Four Dedicated Inputs — 64 Registers — High Speed Global Interconnect


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    PDF 2064E 766A-2064E 0212/2064E 2064E 2064E-200LT 2064E-135LT 2064E-100LT 100-Pin isp2064

    32tCK

    Abstract: No abstract text available
    Text: ispLSI 2064E In-System Programmable SuperFAST High Density PLD Features Functional Block Diagram • SuperFAST HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC — 2000 PLD Gates — 64 I/O Pins, Four Dedicated Inputs — 64 Registers — High Speed Global Interconnect


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    PDF 2064E 00-Pin 766A-2064E 0212/2064E 2064E 2064E-200LT100 100-Pin 2064E-135LT100 32tCK

    Untitled

    Abstract: No abstract text available
    Text: ispLSI 2064E In-System Programmable SuperFAST High Density PLD Features Functional Block Diagram • SuperFAST HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC — 2000 PLD Gates — 64 I/O Pins, Four Dedicated Inputs — 64 Registers — High Speed Global Interconnect


    Original
    PDF 2064E 00-Pin 766A-2064E 0212/2064E 2064E 2064E-200LT100 100-Pin 2064E-135LT100

    Untitled

    Abstract: No abstract text available
    Text: ispLSI 2064E In-System Programmable SuperFAST High Density PLD Features Functional Block Diagram • SuperFAST HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC — 2000 PLD Gates — 64 I/O Pins, Four Dedicated Inputs — 64 Registers — High Speed Global Interconnect


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    PDF 2064E 766A-2064E 0212/2064E 2064E 2064E-200LT 2064E-135LT 2064E-100LT 100-Pin

    CXD 4191

    Abstract: H9925 jd 1803 b 107 jd 1803 data jd 1803 19 B L64032 L6421 SEL620 L64270QC Pal programming 22v10
    Text: L64032 32 x 32-Bit Multiplier-Accumulator The L64032 is a high-speed 32 x 32-bit parallel multiplier-accumulator which provides single precision 32 x 32 and multiple precision (64 x 64) fixed point multiplication and single precision multiplication with accumulation.


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    PDF L64032 32-Bit 32bit CXD 4191 H9925 jd 1803 b 107 jd 1803 data jd 1803 19 B L6421 SEL620 L64270QC Pal programming 22v10

    isp2064

    Abstract: No abstract text available
    Text: ispLSI 2064E In-System Programmable SuperFAST High Density PLD Features Functional Block Diagram • SuperFAST HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC — 2000 PLD Gates — 64 I/O Pins, Four Dedicated Inputs — 64 Registers — High Speed Global Interconnect


    Original
    PDF 2064E 2064E 100-Pin 766A-2064E 0212/2064E 2064E-200LT isp2064

    Untitled

    Abstract: No abstract text available
    Text: ispLSI 2064E In-System Programmable SuperFAST High Density PLD Features Functional Block Diagram • SuperFAST HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC — 2000 PLD Gates — 64 I/O Pins, Four Dedicated Inputs — 64 Registers — High Speed Global Interconnect


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    PDF 2064E 766A-2064E 0212/2064E 2064E 2064E-200LT100 2064E-135LT100 2064E-100LT100 100-Pin

    Untitled

    Abstract: No abstract text available
    Text: L9D364M64SBG2 4.0 Gb, DDR3, 64 M x 64 Integrated Module IMOD Benefits FEATURES DDR3 Integrated Module [iMOD]: "‚"XDD?XDDS?307X"ø"20297X ‚"307X"egpvgt/vgtokpcvgf."rwuj1rwnn" K1Q " ‚"Rcemcig<"38oo"z"44oo"z"304oo." 35"z"43"ocvtkz"y1"493dcnnu " ‚"Ocvtkz"dcnn"rkvej<"3022oo


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    PDF L9D364M64SBG2 20297X 304oo. 493dcnnu 3022oo LDS-L9D364M64SBG2-G

    ad149

    Abstract: weitek 3164
    Text: 3164/3364 64-BIT FLOATING-POINT DATA PATH UNITS November 1989 1. Features 64-BIT FLOATING-POINT DATA PATH FULL FUNCTION 64-bit and 32-bit floating-point and 32-bit integer multiplier Divide and square root operations Single-cycle pipeline throughput for the following


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    PDF 64-BIT 32-bit ad149 weitek 3164

    Siemens MTT 95 A 12 N

    Abstract: Siemens MTT 95 A 16 N siemens sab 82525 STT 3 SIEMENS siemens EM 235 cn PEB 2261 DCA 306 EPIC-1 pin diagram for IC 76733 ILP psu 180
    Text: S IE M E N S Extended Line Card Interface Controller ELIC 1 PEB 20550 PEF 20550 Features S w itching EPIC®-1 • Non-blocking switch for 32 digital (e.g. ISDN) or 64 voice subscribers - Bandwidth 16, 32, or 64 kbit/s - Two consecutive 64-bit/s channels can be


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    PDF 64-bit/s 128-kbit/s 007flfi0a 7Cl80x 2IA-BIDI80x Information11 54CC2 Siemens MTT 95 A 12 N Siemens MTT 95 A 16 N siemens sab 82525 STT 3 SIEMENS siemens EM 235 cn PEB 2261 DCA 306 EPIC-1 pin diagram for IC 76733 ILP psu 180

    EQUIVALENT OF SR240

    Abstract: XL-8137 weitek Weitek 3364 weitek 3164 Weitek xl-8136 wtl3364 CXNL 0x78F y2274
    Text: tilEIT EK CORP Tbb3ö2b O O O lS lö 11E D □ 3164/3364 64-BIT FLOATING-POINT DATA PATH UNITS T - W - H - o S November 1989 1. Features 64-BIT FLO A T IN G -PO IN T D A T A PA T H F U L L FU N C T IO N 64-bit and 32-bit floating-point and 32-bit integer multiplier


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    PDF 64-BIT 32-bit EQUIVALENT OF SR240 XL-8137 weitek Weitek 3364 weitek 3164 Weitek xl-8136 wtl3364 CXNL 0x78F y2274

    Untitled

    Abstract: No abstract text available
    Text: u n i 8 4 0 0 s e rie s 2 row •3 row type 10 ■nverse DIN 64 : 96 ^Q1233b □□□□142 271 / / / / i 8 4 0 0 s e rie s 2 row ■ 3 row type 64 (Inverse DIN Press-fit Type) 96 | 8401-064-293XX Pin Receptacle (Press-fit) 2-02.81?-' 2-02.5(2'<ftO.O98)


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    PDF Q1233b 8401-064-293XX 54X31 100x31 8401-096-293XX IEC603-2

    D018

    Abstract: D019 D032 D033 D051 THMY51N01C70
    Text: TOSHIBA THMY51N01C70,75,80 TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 67,108,864-WORD BY 64-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THMY51N01C is a 67,108,864-word by 64-bit synchronous dynamic RAM module consisting of 16 TC59SM808CFT DRAMs and an unbuffer on a printed circuit board.


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    PDF THMY51N01C70 864-WORD 64-BIT THMY51N01C TC59SM808CFT 64-bit D018 D019 D032 D033 D051

    JEP-106

    Abstract: MITSUBISHI date code
    Text: MITSUBISHI LSIs Preliminary Some of contents are subject to change without notice. MH4V645/6445AXJJ-5,-6,-5S,-6S HYPER PAGE MODE 268435456-BIT 4194304-WORD BY 64-BIT DYNAMIC RAM DESCRIPTION APPLICATION This is family of 4194304 - word by 64 - bit dynamic RAM


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    PDF MH4V645/6445AXJJ-5 268435456-BIT 4194304-WORD 64-BIT 4Mx16 MH4V645/6445A MIT-DS-0085-1 JEP-106 MITSUBISHI date code

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY IDT49C466 64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • 64-bit wide Flow-thruEDC • Separate System and Memory Data Input/Output Buses • — Error Detect Time: 20ns — Error Correct Time: 22ns


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    PDF IDT49C466 64-BIT 16-deep 208-pin FlatpackO-63 IDT49C466

    FZK 105

    Abstract: D1034A Z22V SN74ABT3614 fzk 101
    Text: SN74ABT3614 64 x 36 x 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY WITH BUS MATCHING AND BYTE SWAPPING SCBS126F - JUNE 1992 - REVISED FEBRUARY 1996 Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Two Independent 64 x 36 Clocked FIFOs Buffering Data in Opposite Directions


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    PDF SN74ABT3614 independent64x36dual-port 36-bit, 18-bit, 36-bit 01D3S0B FZK 105 D1034A Z22V fzk 101

    a32u

    Abstract: P11S1 N1415 a32u32 A3203 VAM-03 a15C1 dla s14 200-3
    Text: AUGUST 1991 TM CA91C064 VMEbus 64-B IT DATA ADDRESS REGISTER FILE DARF64 The CA91C064 DARF64 provides a complete high per­ formance VMEbus 64 data transfer interface, including high level functions such as a DMA Controller and a Lo­ cation Monitor with associated message FIFO.


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    PDF CA91C064 64-BIT DARF64) CA91C015 DARF32 IEEE-1014/VMEbus A64/D64, A24/D32, a32u P11S1 N1415 a32u32 A3203 VAM-03 a15C1 dla s14 200-3

    IC HS 8108

    Abstract: HS 8108 B1083 COP822C COP8722C COP820C COP872Q COP872QC COPB722CN lg 500 computer service manual
    Text: PRELIMINARY COP8720C/COP8721C/COP8722C Single-Chip microCMOS Microcontrollers Single supply operation: 2.5V to 6.0V 1024 bytes EEPROM program memory 64 bytes of RAM 64 bytes EEPROM data memory 16-bit read/write timer operates in a variety of modes — Timer with 16-bit auto reload register


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    PDF COP8720C/COP8721C/COP8722C COP8720C/COP8721C/COP8722C COP8720C/COR8721C/COP8722C 16-bit IC HS 8108 HS 8108 B1083 COP822C COP8722C COP820C COP872Q COP872QC COPB722CN lg 500 computer service manual

    COP822C

    Abstract: HS 8108
    Text: COP8720C/COP8721C/COP8722C Single-Chip microCMOS Microcontrollers Single supply operation: 2.5V to 6.0V 1024 bytes EEPROM program memory 64 bytes of RAM 64 bytes EEPROM data memory 16-bit read/write timer operates in a variety of modes — Timer with 16-bit auto reload register


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    PDF COP8720C/COP8721C/COP8722C COP8720C/COP8721C/COP8722C 16-bit TL/OD/9108-23 COP822C HS 8108

    Untitled

    Abstract: No abstract text available
    Text: STI648104G1-70VG 144-PIN SO-DIMMS 8M X 64 Bits DRAM SO-DIMM Memory Module FEATURES GENERAL DESCRIPTION • The Simple Technology STI648104G1-70VG is a 8M x 64 bits Dynamic RAM high density memory module. The Simple Technology STI648104G1-70VG consist of eight CMOS 8M x


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    PDF STI648104G1-70VG 144-PIN 124ns cycles/64ms STI648104G1-70VG 32-pin 400-mil

    D018

    Abstract: D019 D032 D033 D051 TC59SM808BFT THMY51N01B70
    Text: TOSHIBA THMY51N01 B70#75#80 TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 67,108,864-WORD BY 64-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THMY51N01B is a 67,108,864-word by 64-bit synchronous dynamic RAM module consisting of 16 TC59SM808BFT DRAMs and an unbuffer on a printed circuit board.


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    PDF THMY51N01B70 864-WORD 64-BIT THMY51N01B TC59SM808BFT 64-bit D018 D019 D032 D033 D051