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    5114 RAM Search Results

    5114 RAM Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    MD2114A/BVA Rochester Electronics LLC STATIC RAM; 1K X 4 Visit Rochester Electronics LLC Buy
    27S13A/BEA Rochester Electronics LLC 27S13A - 2048-Bit (512X4) Bipolar RAM Visit Rochester Electronics LLC Buy
    CDP1824CD/B Rochester Electronics LLC CDP1824C - 32-Word x 8-Bit Static RAM Visit Rochester Electronics LLC Buy
    CY7C09389V-9AXI Rochester Electronics CY7C09389 - 3.3 V 64 K X 18 Synchronous Dual-Port Static RAM, Industrial Temp Visit Rochester Electronics Buy
    MC68A02CL Rochester Electronics LLC MC68A02 - Microprocessor With Clock and Oprtional RAM Visit Rochester Electronics LLC Buy

    5114 RAM Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    National Discrete Products

    Abstract: No abstract text available
    Text: LF13006,LF13007 LF13006 LF13007 Digital Gain Set Literature Number: SNOSBD2A LF13006 LF13007 Digital Gain Set General Description The LF13006 LF13007 used in conjunction with an amplifier not only satisfies the need for a digitally programmable amplifier in microprocessor based systems but is also useful for discrete applications eliminating the need to find


    Original     		PDF LF13006 LF13007 LF13007 National Discrete Products

    SPRA749B

    Abstract: TMS320C6416
    Text: Application Report SPRA749B - August 2006 Using TMS320C6416 Coprocessors: Turbo Coprocessor TCP Chad Courtney Digital Signal Processing Solutions ABSTRACT The turbo coprocessor (TCP) is a programmable peripheral for decoding IS2000/3GPP turbo codes, that are integrated into the Texas Instruments (TI) TMS320C6416 digital signal


    Original     		PDF SPRA749B TMS320C6416 IS2000/3GPP

    TMS320C6416

    Abstract: convolutional encoder interleaving llr approximation
    Text: Application Report SPRA749 - June 2001 Using TMS320C6416 Coprocessors: Turbo Coprocessor TCP Jelena Nikolic-Popovic Digital Signal Processing Solutions ABSTRACT The Turbo Coprocessor (TCP) is a programmable peripheral for decoding of IS2000/3GPP turbo codes, integrated into Texas Instruments’ TMS320C6416 Digital Signal Processor. The


    Original     		PDF SPRA749 TMS320C6416 IS2000/3GPP convolutional encoder interleaving llr approximation

    IS-5114

    Abstract: la log TMS320C6416 MAPLE-1 llr approximation turbo decoder interleaver 3GPP turbo decoder log-map nsb10
    Text: Application Report SPRA749A - December 2003 Using TMS320C6416 Coprocessors: Turbo Coprocessor TCP Jelena Nikolic-Popovic Digital Signal Processing Solutions ABSTRACT The turbo coprocessor (TCP) is a programmable peripheral for decoding IS2000/3GPP turbo


    Original     		PDF SPRA749A TMS320C6416 IS2000/3GPP IS-5114 la log MAPLE-1 llr approximation turbo decoder interleaver 3GPP turbo decoder log-map nsb10

    j 5804

    Abstract: turbo decoder Viterbi Decoder convolutional encoder interleaving turbo decoder coprocessor Turbo Decoder forward backward posteriori C6000 SPRU189 SPRU190 TMS320C6000
    Text: TMS320C64x DSP Turbo-Decoder Coprocessor TCP Reference Guide Literature Number: SPRU534B September 2004 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue


    Original     		PDF TMS320C64x SPRU534B j 5804 turbo decoder Viterbi Decoder convolutional encoder interleaving turbo decoder coprocessor Turbo Decoder forward backward posteriori C6000 SPRU189 SPRU190 TMS320C6000

    umts turbo encoder

    Abstract: umts turbo encoder circuit DS31 DSP48 XC5VSX95T xilinx TURBO rsc Encoder trellis code
    Text: 3GPP Turbo Encoder v4.0 DS319 June 24, 2009 Product Specification Features General Description • Drop-in module for Virtex -4, Virtex-5, Virtex-6, Spartan®-6, Spartan-3, and Spartan-3E FPGAs • Implements the 3GPP/UMTS specification [Ref 1] [Ref 2] The theory of operation of the Turbo Codes is described


    Original     		PDF DS319 umts turbo encoder umts turbo encoder circuit DS31 DSP48 XC5VSX95T xilinx TURBO rsc Encoder trellis code

    56B3

    Abstract: 5.6B3 FFG1157 vhdl convolution coding Turbo Code LogiCORE IP License Terms block interleaver in modelsim umts turbo encoder
    Text: LogiCORE IP 3GPP Turbo Encoder v4.1 DS319 July 25, 2012 Product Specification Introduction LogiCORE IP Facts Table This version of the Turbo Convolution Code TCC encoder is designed to meet the 3GPP mobile communication system specification [Ref 1], [Ref 2].


    Original     		PDF DS319 56B3 5.6B3 FFG1157 vhdl convolution coding Turbo Code LogiCORE IP License Terms block interleaver in modelsim umts turbo encoder

    Untitled

    Abstract: No abstract text available
    Text: ispLever CORE TM Turbo Encoder User’s Guide November 2008 ipug08_04.4 Lattice Semiconductor Turbo Encoder User’s Guide Introduction This document contains technical information about the Lattice Turbo Encoder IP core. Turbo coding is an advanced error correction technique widely used in the communications industry. The Turbo


    Original     		PDF ipug08

    rsc Encoder

    Abstract: convolutional encoder interleaving Turbo Encoder interleaver 7136 pin diagram encoder LFEC20E-5F672C LFX500B-04F516C convolutional Block Interleaver
    Text: Turbo Encoder September 2004 IP Data Sheet Features General Description • Fully Compatible with the Following Standards Turbo coding is an advanced error correction technique widely used in the communications industry. Turbo encoders and decoders are key elements in today’s


    Original     		PDF S0002-A LFEC20E-5F672C rsc Encoder convolutional encoder interleaving Turbo Encoder interleaver 7136 pin diagram encoder LFX500B-04F516C convolutional Block Interleaver

    BA 5104

    Abstract: No abstract text available
    Text: HA-5102, HA-5104, HA-5114 Semiconductor April 1999 Data Sheet Dual and Quad, 8MHz and 60MHz, Low Noise Operational Amplifiers Low noise and high pe rfo rm an ce are key w o rds de scrib ing H A -5102, H A -5 10 4 and H A -5114. T hese general pu rpo se am p lifie rs offer an array o f d yn a m ic sp e cifica tio n s ranging


    OCR Scan     		PDF HA-5102, HA-5104, HA-5114 60MHz, BA 5104

    5114 ram

    Abstract: 5114 intel 2114a 2114a
    Text: 5114 1024 x 4 BIT STATIC CM O S RAM • Fully Static Operation; No Clocks, Strobes or Latches ■ Data Retention at 2.0V ■ Identical Cycle and Access Times ■ High Performance; 150 ris Access Time ■ TTL Compatible Inputs and Outputs ■ Hi9 h Dens'ty 18-Pin Package


    OCR Scan     		PDF 18-Pin 4096-bit 5114 ram 5114 intel 2114a 2114a

    5114 ram

    Abstract: No abstract text available
    Text: OKI semiconductor MSM5114RS 4096-BIT 1024 x 4 CMOS STATIC RAM GENERAL DESCRIPTION The O ki MSM 5114 is a 4 0 9 6 -b it static Random Access M em ory organized as 1024 words by 4 bits using O ki's reliable S ilicon Gate CMOS te chnology. It uses fu lly static c irc u itry and therefore requires no clocks o r refreshing


    OCR Scan     		PDF MSM5114RS 4096-BIT 18-pin 5114RS 5114 ram

    t2d40

    Abstract: HA-5114 5114
    Text: a H a rris H A -5 1 1 4 /8 8 3 Low Noise, High Performance O perational Amplifier January 1989 F eatures D escrip tio n • This Circuit Is Processed in Accordance to M ll-S td - Low noise and high performance are key w ords describing the quad, uncompensated HA-5114/883. This general


    OCR Scan     		PDF HA-5114/883 Mll-Std-883 30MHz 100kV/V 250kV/V 100dB -550C 1250C 125OC t2d40 HA-5114 5114

    4464 ram

    Abstract: us4k 74C930 6116 ram 2k 74c920 6508 ram 4464 memory 6164 memory
    Text: In d u s try CMOS RAM C ross R eference H A R R IS C M O S R A M s F U J ID E SC RIPTIO N HARR IS AM O EDI rrsu H IT­ AC H I ID T M ITS U ­ BISHI M OT­ O R O LA N AT­ IO N A L 6508 6508 74C 929 6518 6518 74C 930 NEC O KI H A R R IS / RCA TO SH­ IB A N M O S,


    OCR Scan     		PDF 8816H 4464 ram us4k 74C930 6116 ram 2k 74c920 6508 ram 4464 memory 6164 memory

    74c920

    Abstract: ram 6164 6116 RAM 2116 ram 2064 ram 74C929 4016 RAM 4045 RAM 6264 cmos ram 74C930
    Text: Industry CMOS RAM Cross Reference h a r r is c m o s ram s DESCRIPTION AMD HARRIS FUJ­ ITSU EDI HIT­ ACHI IDT M ITSU­ MOT­ BISHI OROLA N A T­ IONAL NEC RCA OKI TOSH* ISA SMOS NMOS, OTHER 1K CMOS RAMs 1Kx1, 16 Pin Synchronous HM-6508 1 Kx1, 18 Pin Synchronous


    OCR Scan     		PDF 256x4, HM-6508 HM-6518 HM-6551 HM-6561 74C929 74C930 74C920 HM-6504 74c920 ram 6164 6116 RAM 2116 ram 2064 ram 4016 RAM 4045 RAM 6264 cmos ram

    PCD5114P

    Abstract: PCD5114 PCD5114D PCD511 PCD5114T sbb2114 pcd 5114
    Text: DEVELOPMENT DATA PCD5114 This data sheet contains advance in form ation and specifications are subject to change w ith o u t notice. 1024 x 4-BIT STATIC RAM G ENERAL DESCRIPTION The PCD5114 is a low-power, high-speed 4096-bit static CMOS RAM, organized as 1024 words o f


    OCR Scan     		PDF PCD5114 PCD5114 4096-bit SBB2114 PCD5114P PCD5114D PCD511 PCD5114T pcd 5114

    Untitled

    Abstract: No abstract text available
    Text: STI328100D1 -xxVG 72-PIN SO-DIMMS 8M X 32 DRAM SO-DIMM Memory Module FEATURES GENERAL DESCRIPTION • The Simple Technology STI328100D1 is a 8M x 32 bits Dynamic RAM high density memory module. The Simple Technology STI328100D1 consist of four CMOS 8M x 8 bits DRAMs in 34pin TSOP package mounted on a 72-pin glass epoxy substrate.


    OCR Scan     		PDF STI328100D1 -50VG -60VG -70VG 110ns 130ns 72-PIN 34pin

    MCM6264

    Abstract: mcm6264p20 MCM6264BP25 MCM6264BP
    Text: MOTOROLA H SEM ICO NDUCTO R TECHNICAL DATA MCM6264 8K x 8 Bit Fast Static RAM The MCM6264 is fabricated using Motorola's high-performance silicon-gate CMOS technology. Static design eliminates the need for external clocks or tim ­ ing strobes, while CMOS circuitry reduces power consum ption and provides tor


    OCR Scan     		PDF MCM6264 MCM6264 300-mil CM6264P15 MCM6264P20 MCM6264BP25 MCM6264BP35 MCM6264NJ15 MCM6264BP

    Untitled

    Abstract: No abstract text available
    Text: SEC NEC Electronics Inc. MC-424256A36BH/FH 262,144 x 36-Bit Dynamic CMOS RAM Module Description Pin Configuration The MC-424256A36BH/FH is a fast-page dynamic RAM module organized as 262,144 words by 36 bits and designed to operate from a single + 5-volt power sup­


    OCR Scan     		PDF MC-424256A36BH/FH 36-Bit MC-424256A36BH/FH 72-Pin

    MCM6264P20

    Abstract: MCM6264P mcm6264bp25 mcm6264bnj35 MCM6264BP MCM6264 motorola 5118 setup MCM6264BP35 MCM6264BP-35 6264 static RAM
    Text: nOTOKOLA SC HEriORY/ASIC MOTOROLA S IE ]> b3b?251 QOflBTSe 7 b l • M0T3 ■ SEM ICO ND U C TO R mmmammt TECHNICAL DATA MCM6264 8K x 8 Bit Fast Static RAM The MCM6264 is fabricated using Motorola’s high-performance silicon-gate CMOS technology. Static design eliminates the need for external clocks or tim­


    OCR Scan     		PDF MCM6264 MCM6264 b3b72Sl 300-mil MCM6264P15 MCM6264P20 MCM6264BP25 MCM6264BP35 MCM6264P mcm6264bnj35 MCM6264BP motorola 5118 setup MCM6264BP-35 6264 static RAM

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MCM67H618A Product Preview 64K x 18 Bit BurstRAM Synchronous Fast Static RAM With Burst Counter and Self-Timed Write The MCM67H618A is a 1,179,648 bit synchronous fast static random access memory designed to provide a burstable, high-performance, secondary cache


    OCR Scan     		PDF MCM67H618A MCM67H618A i486TM MCM67H618AFN9 MOM67H618AFN9S 67H618A CM67H618A-` 67H618AFN10 67H618AFN12

    TM497BBK32S

    Abstract: Q 4.194 304 417400D TM893CBK32 TM893CBK32S
    Text: TM497BBK32, TM497BBK32S 4194 304 BY 32-BIT DYNAMIC RAM MODULE TM893CBK32, TM893CBK32S 8 388 608 BY 32-BIT DYNAMIC RAM MODULE SMMS433-JANUARY1993 Organization TM497BBK32 . . . 4 194 304 x 32 TM893CBK32 . . . 8 388 608 x 32 • Presence Detect • Performance Ranges:


    OCR Scan     		PDF TM497BBK32, TM497BBK32S 32-BIT TM893CBK32, TM893CBK32S SMMS433-JANUARY1993 TM497BBK32 TM893CBK32 72-Pln Q 4.194 304 417400D TM893CBK32

    UC2823 APPLICATION

    Abstract: No abstract text available
    Text: IN T E G R A T E D C IR C U IT S UC1823 UC2823 UC3823 UNITRODE High Speed PWM Controller FEATURES DESCRIPTION • Compatible with Voltage or Current-Mode Topologies • Practical Operation @ Switching Frequencies to 1.OMHz • 50ns Propagation Delay to Output


    OCR Scan     		PDF UC1823 UC2823 UC3823 UC1823 Cl-10nF) 134a51c UC2823 APPLICATION

    eprom 2704

    Abstract: 2704 eprom 2708 eprom eprom 2708 2708-1 1024X8 512X8 2704-1 signetics 2704 2704
    Text: 2704-1 • 2708-1 PIN CONFIGURATION DESCRIPTION FEATURES T he 2708/2704 are high speed Erasable and E le c tr ic a lly R e p ro g ra m m a b le ROMs EPROM ideally suited w here fast turn a round and pattern ex p e rim e n ta tio n are im ­ po rta n t requirem ents.


    OCR Scan     		PDF 1024X8 512X8 programming-10d 2537A20. UVS-54 eprom 2704 2704 eprom 2708 eprom eprom 2708 2708-1 512X8 2704-1 signetics 2704 2704