5 INPUT OR GATE Search Results

Contextual Info: Section 3 Contents F100101 Triple 5-Input OR/NOR G a te . F100102 Quint 2-Input OR/NOR Gate .

74LVC1G386

Abstract: 74LVC1G386GV 74LVC1G386GW
Contextual Info: 74LVC1G386 3-input EXCLUSIVE-OR gate Rev. 02 — 3 September 2007 Product data sheet 1. General description The 74LVC1G386 provides a 3-input EXCLUSIVE-OR function. The input can be driven from either 3.3 or 5 V devices. This feature allows the use of these devices in a mixed 3.3 and 5 V environment.

IDT74LVC86A

Contextual Info: IDT74LVC86A 3.3V CMOS QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE INDUSTRIAL TEMPERATURE RANGE IDT74LVC86A 3.3V CMOS QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE WITH 5 VOLT TOLERANT I/O DESCRIPTION: FEATURES: This quadruple 2-input exclusive-OR gate is built using advanced dual

MC10109

Contextual Info: MOTOROLA MC10109 DUAL 4-5-INPUT "OR/NOR" GATE DUAL 4-5-INPUT “OR/NOR" GATE The MC10109 is a dual 4-5 Input OR/NOR gate. PD = 30 m W typ/gate No Load t pd = 2.0 ns typ t r, tf = 2.0 ns typ (20%—80%) L SUFFIX CERAMIC PACKAGE CASE 620 1 P SUFFIX PLASTIC PACKAGE

Contextual Info: 74LVC32A Quad 2-input OR gate Rev. 5 — 17 November 2011 Product data sheet 1. General description The 74LVC32A provides four 2-input OR gates. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.

application note sot353-1 nxp

Contextual Info: 74LVC1G86 2-input EXCLUSIVE-OR gate Rev. 9 — 5 March 2012 Product data sheet 1. General description The 74LVC1G86 provides the 2-input EXCLUSIVE-OR function. Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.

Contextual Info: 74LVC32A Quad 2-input OR gate Rev. 5 — 17 November 2011 Product data sheet 1. General description The 74LVC32A provides four 2-input OR gates. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.

100352

Contextual Info: * Section 2 Contents 100201 Low Power 2-Input OR/NOR G ate/Inverter. 100301 Low Power Triple 5-Input OR/NOR G a te .

Contextual Info: * TRIPLE 5-INPUT OR/NOR GATE SYNERGY SEMICONDUCTOR SY100S301 SY101S301 PRELIMINARY DESCRIPTION FEATURES • Max. Propagation Delay of 700 ps. The SY100/101S301 is an ultra-fast triple 5-input OR/NOR gate designed for use in high performance ECL systems. The inputs on

100101DC

Contextual Info: 100101 National Semiconductor F100101 Triple 5-Input OR/NOR Gate General Description The F100101 is a monolithic triple 5-input OR/NOR gate. All inputs have 50 k fl pull-down resistors and all outputs are buffered. Refer to the F100301 datasheet for: PCC packaging

74LVC32A

Abstract: 74LVC32ABQ 74LVC32AD 74LVC32ADB 74LVC32APW DHVQFN14 SSOP14 TSSOP14
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74LVC32A Quad 2-input OR gate Product specification Supersedes data of 1997 Jun 30 2003 Jul 16 Philips Semiconductors Product specification Quad 2-input OR gate 74LVC32A FEATURES DESCRIPTION • 5 V tolerant inputs for interfacing with 5 V logic

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Abstract: 100118F 100118Y lt 748
Contextual Info: Signetics 100118 Gate Quint 2-4-4-4-5-Input OR-AND Gate Product Specification ECL Products DESCRIPTION The 100118 is a 5-wide OR-AND 2-4-4­ 4-5 input Gate with true and complemen­ tary outputs. TYPE TY PIC AL PROPAGATION DELAY TYPIC AL SUPPLY CURRENT 100118

Contextual Info: NATIONAL SEflICOND LOGIC 31E D hsoiiaa 007104=1 t T-M 5 -7-Z -O O IOT National SjA Semiconductor F100101 Triple 5-input OR/NOR Gate General Description The F100101 is a monolithic triple 5-input OR/NOR gate. All Inputs have 50 k il pull-down resistors and all outputs are

Contextual Info: Revised November 1999 100301 Low Power Triple 5-Input OR/NOR Gate General Description Features The 100301 is a monolithic triple 5-input OR/NOR gate. All inputs have 50 kΩ pull-down resistors and all outputs are buffered. • 23% power reduction of the 100101

Contextual Info: 100101 KgM National ÉjA Semiconductor F100101 Triple 5-Input OR/NOR Gate General Description TheF100101 is a monolithic triple 5-input OR/NOR gate. All inputs have 50 k il pull-down resistors and all outputs are buffered. Ordering~Code: Refer to the F100301 datasheet for:

74LVC86A

Abstract: 74LVC86ABQ 74LVC86AD 74LVC86ADB 74LVC86APW SSOP14 TSSOP14
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74LVC86A Quad 2-input EXCLUSIVE-OR gate Product specification Supersedes data of 2003 Nov 11 2004 Mar 04 Philips Semiconductors Product specification Quad 2-input EXCLUSIVE-OR gate 74LVC86A FEATURES DESCRIPTION • 5 V tolerant inputs, for interfacing with 5 V logic

F100K

Abstract: SY100S301 SY100S301FC SY100S301JC SY100S301JCTR F100K ECL book
Contextual Info: TRIPLE 5-INPUT OR/NOR GATE SY100S301 DESCRIPTION FEATURES • Max. propagation delay of 750ps ■ IEE min. of –25mA ■ Industry standard 100K ECL levels ■ Extended supply voltage option: VEE = –4.2V to –5.5V The SY100S301 is an ultra-fast triple 5-input OR/NOR

fairchild ECL datasheet

Abstract: diode d4c F100K SY100S301 SY100S301FC SY100S301JC SY100S301JCTR F100K ECL book
Contextual Info: TRIPLE 5-INPUT OR/NOR GATE SY100S301 FINAL DESCRIPTION FEATURES • Max. propagation delay of 750ps ■ IEE min. of –25mA ■ Industry standard 100K ECL levels ■ Extended supply voltage option: VEE = –4.2V to –5.5V The SY100S301 is an ultra-fast triple 5-input OR/NOR

SP1600 SERIES ECL III

Abstract: SP1600
Contextual Info: SP1664/5 O PLESSEY SP1600 SERIES SEMICONDUCTORS ECL III SP1664 SP1665 HIGH Z (LOWZ) QUAD 2-INPUT OR GATE The SP1664/5 comprises four 2-input OR gating functions in a single package. An internal bias reference voltage ensures that the threshold point remains in the

DALE R 01F

Abstract: 5962-9152801MXA F301
Contextual Info: N ation al Semiconductor MICROCIRCUIT DATA SHEET Wmm MN100301-X REV ICO Last Major Revision Date: 05/09/96 LOW P OWER TRIPLE 5-INPUT OR/NOR GATE General Description The 100301 is a monolithic triple 5-input OR/NOR gate. resistors and all outputs are buffered.

74LVC1G86

Abstract: 74LVC1G86GF 74LVC1G86GM 74LVC1G86GV 74LVC1G86GW JESD22-A114E
Contextual Info: 74LVC1G86 2-input EXCLUSIVE-OR gate Rev. 06 — 18 July 2007 Product data sheet 1. General description The 74LVC1G86 provides the 2-input EXCLUSIVE-OR function. Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.

Contextual Info: 74LVC1G32 Single 2-input OR gate Rev. 9 — 12 April 2012 Product data sheet 1. General description The 74LVC1G32 provides one 2-input OR function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.

Contextual Info: 74LVC32A Quad 2-input OR gate Rev. 4 — 19 October 2011 Product data sheet 1. General description The 74LVC32A provides four 2-input OR gates. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.

Contextual Info: 74LVC1G86 2-input EXCLUSIVE-OR gate Rev. 8 — 1 December 2011 Product data sheet 1. General description The 74LVC1G86 provides the 2-input EXCLUSIVE-OR function. Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.