40VPP-12NS Search Results
40VPP-12NS Result Highlights (3)
| Part | ECAD Model | Manufacturer | Description | Download | Buy |
|---|---|---|---|---|---|
| SN74F112NSR |
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Dual J-K Negative-Edge-Triggered Flip-Flop With Clear And Preset 16-SO 0 to 70 |
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| CD74HC112NSR |
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High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SO -55 to 125 |
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| CD74HC112NS |
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High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SO |
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