74F64
Abstract: No abstract text available
Text: 54F64,74F64 54F64 74F64 4-2-3-2-Input AND/OR Invert Gate Literature Number: SNOS209A 54F 74F64 4-2-3-2-Input AND-OR-Invert Gate General Description This device contains gates configured to perform a 4-2-3-2 input AND-OR-INVERT function Commercial Package Number
|
Original
|
54F64
74F64
74F64
SNOS209A
74F64PC
14-Lead
74F64SC
|
PDF
|
74F64
Abstract: N74F64D N74F64N
Text: INTEGRATED CIRCUITS 74F64 4-2-3-2-input AND-OR-invert gate Product specification IC15 Data Handbook Philips Semiconductors 1996 Mar 14 Philips Semiconductors Product specification 4-2-3-2-input AND-OR-invert gate TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT
|
Original
|
74F64
14-pin
N74F64N
OT27-1
N74F64D
OT108-1
SF00094
74F64
N74F64D
N74F64N
|
PDF
|
74F64
Abstract: 74F64PC 74F64SC M14A N14A
Text: 74F64 4-2-3-2-Input AND-OR-Invert Gate General Description This device contains gates configured to perform a 4-2-3-2 input AND-OR-INVERT function. Ordering Code: Commercial Package Package Description Number 74F64PC N14A 14-Lead 0.300" Wide Molded Dual-In-Line
|
Original
|
74F64
74F64PC
14-Lead
74F64SC
DS009467-2
DS009467-3
74F64
74F64PC
74F64SC
M14A
N14A
|
PDF
|
54F64DM
Abstract: 54F64FM 54F64LM 74F64 74F64PC 74F64SC J14A M14A N14A W14B
Text: 54F 74F64 4-2-3-2-Input AND-OR-Invert Gate General Description This device contains gates configured to perform a 4-2-3-2 input AND-OR-INVERT function Commercial Package Number Military 74F64PC Package Description N14A 14-Lead 0 300 Wide Molded Dual-In-Line
|
Original
|
74F64
74F64PC
14-Lead
54F64DM
14-Lead
54F64FM
54F64LM
20-Lead
54F64DM
54F64FM
54F64LM
74F64
74F64PC
74F64SC
J14A
M14A
N14A
W14B
|
PDF
|
74F64
Abstract: 4-2-3-2-input AND-OR-invert gate 74F64PC 74F64SC 74F64SJ M14A M14D MS-001 N14A
Text: Revised September 2000 74F64 4-2-3-2-Input AND-OR-Invert Gate General Description This device contains gates configured to perform a 4-2-3-2 input AND-OR-INVERT function. Ordering Code: Order Number Package Number Package Description 74F64SC M14A 14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-120, 0.150 Narrow
|
Original
|
74F64
74F64SC
14-Lead
MS-120,
74F64SJ
74F64PC
MS-001,
74F64
4-2-3-2-input AND-OR-invert gate
74F64PC
74F64SC
74F64SJ
M14A
M14D
MS-001
N14A
|
PDF
|
74F64
Abstract: 74F64PC 74F64SC 74F64SJ M14A M14D MS-001 N14A
Text: Revised March 1999 74F64 4-2-3-2-Input AND-OR-Invert Gate General Description This device contains gates configured to perform a 4-2-3-2 input AND-OR-INVERT function. Ordering Code: Order Number Package Number Package Description 74F64SC M14A 14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-120, 0.150 Narrow
|
Original
|
74F64
74F64SC
14-Lead
MS-120,
74F64SJ
74F64PC
MS-001,
74F64
74F64PC
74F64SC
74F64SJ
M14A
M14D
MS-001
N14A
|
PDF
|
54F64LMQB
Abstract: 54F64 54F64DMQB 54F64FMQB
Text: MILITARY DATA SHEET Original Creation Date: 03/12/96 Last Update Date: 07/30/96 Last Major Revision Date: 03/12/96 MN54F64-X REV 1A0 4-2-3-2- INPUT AND-OR-INVERT GATE General Description This device contains gates configured to perform a 4-2-3-2 input AND-OR-INVERT function.
|
Original
|
MN54F64-X
54F64
54F64DMQB
54F64FMQB
54F64LMQB
MIL-STD-883,
-55/125C
54F64LMQB
54F64
54F64DMQB
54F64FMQB
|
PDF
|
54F64
Abstract: 54F64DC
Text: MICROCIRCUIT DATA SHEET Original Creation Date: 06/25/97 Last Update Date: 07/08/97 Last Major Revision Date: 06/25/97 CN54F64-X REV 0A0 4-2-3-2 INPUT AND-OR-INVERT GATE General Description This device contains gates configured to perform a 4-2-3-2 input AND-OR-INVERT function.
|
Original
|
CN54F64-X
54F64
54F64DC
M0001735
CN74F
CN54F
54F64
54F64DC
|
PDF
|
74F64
Abstract: 74F64DC
Text: MICROCIRCUIT DATA SHEET Original Creation Date: 12/06/96 Last Update Date: 06/19/97 Last Major Revision Date: 12/06/96 CN74F64-X REV 0B0 4-2-3-2 INPUT AND-OR-INVERT GATE General Description This device contains gates configured to perform a 4-2-3-2 input AND-OR-INVERT function.
|
Original
|
CN74F64-X
74F64
74F64DC
M0001331
74F64
74F64DC
|
PDF
|
751A-02
Abstract: 74f64 motorola
Text: MC54/74F64 4-2-3-2-INPUT AND-OR-INVERT GATE 4-2-3-2-INPUT AND-OR-INVERT GATE FAST SCHOTTKY TTL VCC 14 13 12 11 10 9 8 J SUFFIX CERAMIC CASE 632-08 1 2 3 4 5 6 14 7 1 GND N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION
|
Original
|
MC54/74F64
51A-02
MC54FXXJ
MC74FXXN
MC74FXXD
54/74F
751A-02
74f64 motorola
|
PDF
|
74LS51
Abstract: 751A-02 74LS51 truth table
Text: SN54/74LS51 DUAL 2-WIDE 2-INPUT/ 3-INPUT AND-OR-INVERT GATE DUAL 2-WIDE 2-INPUT / 3-INPUT AND-OR-INVERT GATE LOW POWER SCHOTTKY VCC 14 13 12 11 10 9 8 J SUFFIX CERAMIC CASE 632-08 14 1 2 3 4 5 6 1 7 GND N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC
|
Original
|
SN54/74LS51
51A-02
SN54LSXXJ
SN74LSXXN
SN74LSXXD
74LS51
751A-02
74LS51 truth table
|
PDF
|
74LS51 truth table
Abstract: 74ls51 4 inputs OR gate truth table truth table SN54LSXXJ SN74LSXXN SN74LSXXD truth table NOT gate 74 751A-02
Text: SN54/74LS51 DUAL 2-WIDE 2-INPUT/ 3-INPUT AND-OR-INVERT GATE DUAL 2-WIDE 2-INPUT/ 3-INPUT AND-OR-INVERT GATE LOW POWER SCHOTTKY VCC 14 13 12 11 10 9 8 J SUFFIX CERAMIC CASE 632-08 14 1 2 3 4 5 6 1 7 GND N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02
|
Original
|
SN54/74LS51
51A-02
SN54LSXXJ
SN74LSXXN
SN74LSXXD
74LS51 truth table
74ls51
4 inputs OR gate truth table
truth table
SN54LSXXJ
SN74LSXXN
SN74LSXXD
truth table NOT gate 74
751A-02
|
PDF
|
751A-02
Abstract: H12Y 74f51
Text: MC54/74F51 DUAL 2-WIDE 2-INPUT, 2-WIDE 3-INPUT AND-OR-INVERT GATE CONNECTION DIAGRAM VCC 1C 1B 1F 1E 1D 1Y 14 13 12 11 10 9 8 DUAL 2-WIDE 2-INPUT, 2-WIDE 3-INPUT AND-OR-INVERT GATE FAST SCHOTTKY TTL 1 2 3 4 5 6 7 1A 2A 2B 2C 2D 2Y GND J SUFFIX CERAMIC CASE 632-08
|
Original
|
MC54/74F51
54/74F
751A-02
H12Y
74f51
|
PDF
|
truth table 74ls54
Abstract: 4 inputs OR gate truth table 751A-02 74Ls54 SN74LSXXD SN54LSXXJ SN74LSXXN truth table NOT gate 74 3-2-2-3-input AND-OR-invert gate
Text: SN54/74LS54 3-2-2-3-INPUT AND-OR-INVERT GATE 3-2-2-3-INPUT AND-OR-INVERT GATE LOW POWER SCHOTTKY VCC 14 13 12 11 10 9 8 J SUFFIX CERAMIC CASE 632-08 14 1 2 3 4 5 6 1 7 GND N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION
|
Original
|
SN54/74LS54
51A-02
SN54LSXXJ
SN74LSXXN
SN74LSXXD
truth table 74ls54
4 inputs OR gate truth table
751A-02
74Ls54
SN74LSXXD
SN54LSXXJ
SN74LSXXN
truth table NOT gate 74
3-2-2-3-input AND-OR-invert gate
|
PDF
|
|
4 inputs OR gate truth table
Abstract: 74LS55 751A-02 4 inputs OR gate datasheet SN54LSXXJ SN74LSXXN SN74LSXXD truth table NOT gate 74
Text: SN54/74LS55 2-WIDE 4-INPUT AND-OR-INVERT GATE 2-WIDE 4-INPUT AND-OR-INVERT GATE LOW POWER SCHOTTKY VCC 14 13 12 11 10 9 8 J SUFFIX CERAMIC CASE 632-08 14 1 2 3 4 5 6 1 7 GND N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION
|
Original
|
SN54/74LS55
51A-02
SN54LSXXJ
SN74LSXXN
SN74LSXXD
4 inputs OR gate truth table
74LS55
751A-02
4 inputs OR gate datasheet
SN54LSXXJ
SN74LSXXN
SN74LSXXD
truth table NOT gate 74
|
PDF
|
74LS55
Abstract: 751A-02
Text: SN54/74LS55 2-WIDE 4-INPUT AND-OR-INVERT GATE 2-WIDE 4-INPUT AND-OR-INVERT GATE LOW POWER SCHOTTKY VCC 14 13 12 11 10 9 8 J SUFFIX CERAMIC CASE 632-08 14 1 2 3 4 5 6 1 7 GND N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION
|
Original
|
SN54/74LS55
51A-02
SN54LSXXJ
SN74LSXXN
SN74LSXXD
74LS55
751A-02
|
PDF
|
Untitled
Abstract: No abstract text available
Text: MC10117L IL08 ECL 2-WIDE 2-3-INPUT OR-AND/OR-AND-INVERT GATE —TOP VIEW— 16 GND GND 1 15 14 13 12 11 10 9 2 3 4 5 6 7 VEE 8
|
Original
|
MC10117L
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SGS 3-2-2-3-INPUT AND-OR-INVERT GATE DESCRIPTION T h e T 5 4 L S 5 4 /T 7 4 L S 5 4 is a high speed 3-2-2-3-INPUT AND-OR-INVERT GATE fabricated in LOW POWER SCH OTTKY technology. 1 1 B1 Plastic Package D1/D2 Ceramic Package M1 Micro Package C1 Plastic Chip Carrier
|
OCR Scan
|
T54LS54
T74LS54
|
PDF
|
T74LS54B1
Abstract: T74LS54 T54LS54D2 10VII
Text: I 3-2-2-3-INPUT AND-OR-INVERT GATE DESCRIPTION T h e T 5 4 L S 5 4 /T 7 4 L S 5 4 is a high speed 3-2-2-3-INPUT AND-OR-INVERT GATE fabricated in LOW POWER SCHOTTKY technology. 1 1 B1 D1/D2 Plastic Package Ceramic Package O M1 C1 Plastic Chip Carrier Micro Package
|
OCR Scan
|
T54LS54/T74LS54
T54LS54
T74LS54
T74LS54B1
T54LS54D2
10VII
|
PDF
|
74HCT51
Abstract: GD74HCT51
Text: GD54/74HC51, GD54/74HCT51 DUAL AND-OR-INVERT GATES General Description These devices are identical in pinout to the 5 4/74L S 51 . They contain one 2-wide 2-input & one 2-wide 3-input AND-OR-INVERT gates. These devices are characterized for operation over wide
|
OCR Scan
|
GD54/74HC51,
GD54/74HCT51
4/74L
GD74HCT51
GD54HCT51
74HCT51
GD74HCT51
|
PDF
|
Untitled
Abstract: No abstract text available
Text: National Semiconductor MILITARY DATA SHEET Original Creation Date: 03/12/96 Last Update Date: 07/30/96 Last Major Revision Date: 03/12/96 MN54F64-X REV 1A0 4—2—3-2— INPUT AND-OR-INVERT GATE General Description This device contains gates configured to perform a 4-2-3-2 input AND-OR-INVERT function.
|
OCR Scan
|
MN54F64-X
54F64
54F64DMQB
54F64FMQB
S4F64LMQB
MIL-STD-883,
34bTb74
0-55/125C
|
PDF
|
54F64DM
Abstract: 54F64FM 54F64LM 74F64PC 74F64SC E20A J14A M14A N14A W14B
Text: National Semiconductor 54F/74F64 4-2-3-2-lnput AND-OR-lnvert Gate General Description This device contains gates configured to perform a 4-2-3-2 input AND-OR-INVERT function. Ordering Code: see section n Package Number Military Commercial N14A 74F64PC 54F64DM Note 2
|
OCR Scan
|
54F/74F64
74F64PC
14-Lead
54F64DM
14-Lead
74F64SC
54F64FM
54F64LM
54F64DM
54F64FM
54F64LM
74F64PC
74F64SC
E20A
J14A
M14A
N14A
W14B
|
PDF
|
aj 454
Abstract: No abstract text available
Text: to gg National ÆM Semiconductor 54F/74F64 4-2-3-2-lnput AND-OR-lnvert Gate General Description This device contains gates configured to perform a 4-2-3-2 input AND-OR-INVERT function. Ordering Code: See Section 5 Logic Symbol Connection Diagrams IEEE/IEC
|
OCR Scan
|
54F/74F64
54F/74F
aj 454
|
PDF
|
st 2904
Abstract: No abstract text available
Text: s G S-THOMSON 07É D I TTSTSH? QDlSTbô '! | T54LS54 LOW POWER SCHOTTKY ra iw i INTEGR ATED CIRCUITS T74LS54 6TC 16093 T -V 3 ~ /5 r 3-2-2-3-JNPUT A ND -OR-INVERT GATE DESCRIPTION T h e T 5 4 L S 5 4 /T 7 4 L S 5 4 is a high speed 3-2-2-3-INPUT AND-O R-INVERT GATE fabricated
|
OCR Scan
|
T54LS54
T54LS54
T74LS54
st 2904
|
PDF
|