33TIF Search Results

Contextual Info: <0 i'*!?' CMOS 80 MHz, Triple 10-Bit Video DAC ANALOG ► DEVICES FEATURES 80 MHz Pipelined Operation Triple 10-Bit D/A Converters RS-343A/RS-170 Compatible Outputs TTL Compatible Inputs +5 V CMOS Monolithic Construction 40-Pin DIP Package ADV7121 44-Pin PLCC Package (ADV7122)

AC97

Abstract: AN-450 LM4546 VBH48A line out to mic in ic LK 1628 28 pin ic cd 1628
Contextual Info: February 1999 LM4546 AC ’97 Rev 2 Codec with Sample Rate Conversion and National 3D Sound General Description Key Specifications The LM 4546 is an audio codec fo r PC system s which is fully PC98 com pliant and perform s the analog intensive functions of the AC 97 Rev 2 architecture. Using 18-bit S igm a-D elta

IC NE564

Abstract: NE564N equivalent NE564 equivalent NE564I NE564N
Contextual Info: P h ilip s S em icon du cto rs R F Com m u nications P ro du cts Pro d u ct specificatio n Phase-locked loop NE/SE564 DESCRIPTION PIN CONFIGURATIONS The NE/SE564 is a versatile, high guaranteed frequency phase-locked loop designed for operation up to 50MHz. A s shown

AN313

Abstract: An-313
Contextual Info: AN313 AN313 7*ol TJI s 3W • 3W A udio Pow er A m plifier ^ /F e a tu r e s fW h^i —1 lc x < -h x i -fo • Dual power amplifier P 0=3W at Vcc = l6V, RL= 8 n 4C 5c □ 12 » 6C □ 7C □ 10 8q • Stable quiescent current ( I c q ) against variation in

Contextual Info: 19-0172, Rev4, 7/95 SV, Low-Power, Voltage-O utput, S e ria l 12-B it DACs The MAX538&#39;s buffer is fixed at a gain of 1 and the MAX539&#39;s buffer at a gain of 2. The MAX531&#39;s internal op amp may be configured for a gain of 1 or 2, as well as for unipolar or bipolar output voltages. The MAX531

lm 1628

Abstract: AC97 AN-450 LM4547 VBH48A 22340A LM audio circuit ir 033p
Contextual Info: a t i o n a l S e m i c o n d u c t o r LM4547 AC ’97 Rev 2 Codec with National 3D Sound General Description Key Specifications The LM 4547 is an audio codec fo r PC system s which is fully PC98 com pliant and perform s the analog intensive functions of the AC 97 Rev 2 architecture. Using 18-bit S igm a-D elta