329P Search Results

450VAC

Contextual Info: AC High Voltage HARTMAN Aerospace Power Products Features: • 3PST N.O. Double Break Main Contacts • 260/450 VAC, 400 Hz • 20 Amps • High Reliability • Meets many requirements of MIL-R-6106 B-329P 3PST N.O., Double Break, 20 Amps, 260/450 VAC, 400 Hz

Contextual Info: XRT86VX38A 8-CHANNEL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION JULY 2013 REV. 1.0.0 GENERAL DESCRIPTION The XRT86VX38A is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and Long-haul/Shorthual LIU integrated solution featuring R3 technology

SS 1091 asn

Abstract: atmel sine wave pwm circuit atmega 128 atmel atmega 382 SM200 DSAQ00265166. ATMEGA USART programming example ATMEGA 326
Contextual Info: Features • • • • • • • • • • • High Performance, Low Power Atmel AVR® 8-Bit Microcontroller Advanced RISC Architecture – 130 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers

diagram of bp 1361 led driver

Abstract: LSIFC909 DB14-000150-01 M66EN PAR64 PC99 D3318
Contextual Info: LSIFC909 Fibre Channel I/O Processor Technical Manual August 2000 Version 2.1 Order Number S14029.A This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties

CRC-32

Abstract: FREEDM-32P672 GPIC672 PM7380 RHDL672 PM4314
Contextual Info: PMC-Sierra,Inc. Preliminary PM7380 FREEDM-32P672 Frame Engine and Data Link Manager FEATURES The FREEDM32P672 chip offers the following features: • Single-chip multi-channel HDLC controller with a 66 MHz, 32-bit Peripheral Component Interconnect PCI 2.1 compliant bus for

64Kx64

Abstract: ethernet chip switch KS8998 8-Port Fast Ethernet Switch memory bandwidth
Contextual Info: KS8998 – Octal 10/100 Switch with PHY Introduction Highlights The KS8998 is an unmanaged 8-port 10/100 Fast Ethernet integrated switch controller with 8 built-in 10/100 Fast Ethernet physical layer transceivers. It has 2.4 Gbps inter-chip expansion capability. Along

Contextual Info: Features • • • • • • • • • • • High Performance, Low Power Atmel AVR® 8-Bit Microcontroller Advanced RISC Architecture – 130 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers

Contextual Info: v3.0 SX-A Family FPGAs Leading-Edge P erfo rm an c e • 250 MHz System Performance • 3.8ns Clock-to-Out Pad-to-Pad • 350 MHz Internal Performance S p ec ific atio n s • • • • 12,000 to 108,000 Available System Gates Up to 360 User-Programmable I/O Pins

54sx08

Abstract: THERMAL Fuse m20 tf 115 c
Contextual Info: v 3 .0 54SX Family FPGAs Leading Edge Performance • 100%Resource Utilization with 100%Pin Locking • 320 MHz Internal Performance • 3.3VOperation with 5.0VInput Tolerance • 3.7 nsClock-to-Out Pi n-to-Pi n • Very Low Power Consumption • 0.1 ns Input Set-Up

Contextual Info: 54SXFamily FPGAs Leadi ng Edge P e r f o r m a nc e • • 320 MHz Internal Performance • 3.3VOperation with 5.0YInput Tolerance • 3.7 ns Qock-to-Out Pin-to-Pin • • 0.1ns Input Set-Up • Deterministic, Ufcer-Controllable Timing • 0.25 ns d o c k Skew

Contextual Info: v3.2 SX Family FPGAs u e Leading Edge Performance • • • • Features 320 MHz Internal Performance 3.7 ns Clock-to-Out Pin-to-Pin 0.1 ns Input Setup 0.25 ns Clock Skew • • • • • • • • Specifications • • • • 12,000 to 48,000 System Gates

sx08a

Contextual Info: v4.0  SX-A Family FPGAs u e Le a di n g- E d ge P er f o r m a n ce • Configurable I/O Support for 3.3V/5V PCI, 5V TTL, 3.3V LVTTL, 2.5V LVCMOS2 • 2.5V, 3.3V, and 5V Mixed-Voltage Operation with 5V Input Tolerance and 5V Drive Strength • Devices Support Multiple Temperature Grades

A54SX16A

Contextual Info: v4.0  SX-A Family FPGAs u e Le a di n g- E d ge P er f o r m a n ce • Configurable I/O Support for 3.3V/5V PCI, 5V TTL, 3.3V LVTTL, 2.5V LVCMOS2 • 2.5V, 3.3V, and 5V Mixed-Voltage Operation with 5V Input Tolerance and 5V Drive Strength • Devices Support Multiple Temperature Grades

ACTEL BGA329

Abstract: LRD12 54SX A54SX08 A54SX16 A54SX32 PAR64 REQ64 LRD-12 A54SX16P PQFP
Contextual Info: -m e te f v 3 .0 - m 54SX Fami ly FPGAs Leadi ng Edge P e r f o r m a n c e • • 320 MHz Internal Performance • 3.3VOperation with 5.0YInput Tolerance • 3.7 ns Qock-toOut Pin-to-Pin • \fcry Low Power Consumption

TR54016

Abstract: XRT86VX38
Contextual Info: XRT86VX38 8-CHANNEL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION 2011 REV. 1.0.3 GENERAL DESCRIPTION The XRT86VX38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and Long-haul/Shorthual LIU integrated solution featuring R3 technology

atmega169pa

Abstract: RELE 12V 5 pines avr SCHEMATIC circuit diagram 649P avr 328 avr r 448 ldc exam 2011 mur 460 data rele 12V 10A 8021F
Contextual Info: Features • • • • • • • • • • • High Performance, Low Power Atmel AVR® 8-Bit Microcontroller Advanced RISC Architecture – 130 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers

hdlc

Abstract: CRC-32 FREEDM-32A672 PM7381 RHDL672 THDL672
Contextual Info: PM7381 FREEDM-32A672 PMC-Sierra,Inc. Frame Engine and Data Link Manager FEATURES J1/E1 links. You can program the number of time-slots assigned to an HDLC channel from 1 to 24 for T1/J1 and from 1 to 31 (for E1). The FREEDM-32A672 chip offers the following features:

22B2 DIODE

Abstract: A54SX08A A54SX16A A54SX32A A54SX72A PQ208 TQ100 TQ144 TQ176
Contextual Info: v5.2 SX-A Family FPGAs u e Leading-Edge Performance • • • 250 MHz System Performance 350 MHz Internal Performance • • • Specifications • • • • • • 12,000 to 108,000 Available System Gates Up to 360 User-Programmable I/O Pins Up to 2,012 Dedicated Flip-Flops

54SX72

Abstract: A54SX32APQ FBGA-484 A54SX16A THERMAL Fuse m20 tf 115 c PAR64 REQ64 A54SX08A A54SX16 A54SX32A
Contextual Info: Preliminary v1.1 SX-A Family FPGAs Leading Edge Performance • Configurable I/O Support for 3.3V/5.0V PCI, LVTTL, and TTL • Configurable Weak Resistor Pullup or Pulldown for Tri-Stated Outputs at Power Up • 250 MHz System Performance • 4ns Clock-to-Out Pin-to-Pin

MIP 320 f

Abstract: MIP 320 NeoMagic embedded dram control 256-bit 3D and 2D graphics accelerator NMS7041 RGB565 3D LCD controller MIP 232 TV SOC 3D
Contextual Info: PRODUCT BRIEF MiMagic TM NMS7041 System-on-Chip For 3D Handheld Internet Appliances DE S C R IP T IO N MiMagic is NeoMagic's family of highly integrated System-on-Chip TM TM MiMagic solutions, enabling a new generation of handheld Internet appliances with the lowest power, smallest form-factor, and best multimedia

b23n20

Contextual Info: ^ c te -m v 2. 0 l 54SX Family FPGAs • • • • • 100%Resource Utilization with 100%Pin Locking 3.3VOperation with 5.0VInput Tolerance Very Low Power Consumption Deterministic, User-ControlIableTiming Unique, In-System Diagnostic and Debug capability with

NeoMagic

Abstract: NeoMagic 128 etas mac NMS7040 RGB565 MIDI SOC MIPS 32-bit bus architecture
Contextual Info: PRODUCT BRIEF MiMagic TM NMS7040 System-on-Chip For Handheld Internet Appliances DE S C R IP T IO N MiMagic is NeoMagic's family of highly integrated System-on-Chip TM MiMagicTM solutions, enabling a new generation of handheld Internet appliances with the lowest power, smallest form-factor, and best

THERMAL Fuse m20 tf 115 c

Abstract: 54SX A54SX08 A54SX16 A54SX32 PAR64 REQ64 circuit diagram of motherboard W2-081 ac 171
Contextual Info: v3.1 54SX Family FPGAs Le a di ng E dg e P er f or m a nc e F ea t u r es • 320 MHz Internal Performance • 66 MHz PCI • 3.7 ns Clock-to-Out Pin-to-Pin • CPLD and FPGA Integration • 0.1 ns Input Set-Up • Single Chip Solution • 0.25 ns Clock Skew

22B2 DIODE

Abstract: RTSX-S datasheet SX FPGAs A54SX08A A54SX16A A54SX32A A54SX72A PQ208 TQ100 TQ144
Contextual Info: v5.1 SX-A Family FPGAs Leading-Edge Performance • • • 250 MHz System Performance 350 MHz Internal Performance • • • Specifications • • • • • • 12,000 to 108,000 Available System Gates Up to 360 User-Programmable I/O Pins Up to 2,012 Dedicated Flip-Flops