320-BIT RAM Search Results

MN150409

Abstract: MN150810 MN152811 MN150402 MN152810 MN150831 MN150202 mn150832
Contextual Info: • 4-Bit Single Chip Microcomputers, MN1500 Family Category ROM K Byte RAM ( X4-bit) Input/ Output (Lines) 1 96 23 MN150401 4 2 4 MN150602 6 MN155201 2 320 128 320 320 128 MN150837 4 4 8 320 128 192 256 512 32 32 54 32 23 32 21 21 23 33 MN151233 12 512

QFP128

Abstract: QFP124-P-2828 QFP128-P-1818 MN6755240 MN6755320 EP67550
Contextual Info: □ MN6755240 / 320 MN6755240 / 320 1 Type 1 ROM x8-bit 2 4K /3 2K M RAM (x8-bit) 704/1024 1 Minimum Instruction Execution Time 0.33 ms (at 3.3 to 5.5V, 12MHz) With Main Clock operated 0.25 ms (at 4.2 to 5.5V, 16IVlHz) 1 2 2 ms (at 3.3 to 5.5V, 32.768kHz)

ST32F32

Abstract: ST32F320 arm gsm Firmware interface GSM iso 7816-2 320kByte
Contextual Info: ST32F320 Smartcard MCU with 32-bit ARM Cortex M3 CPU and 320 Kbyte high-density Flash memory Data brief Features Hardware features • ARM Cortex™-M3 32-bit RISC core ■ 8 Kbytes of user RAM ■ 320 Kbytes of user Flash memory with OTP area: – 10-year data retention

Contextual Info: ST32F320-M M2M MCU with 32-bit ARM Cortex M3 CPU and 320 Kbyte high-density Flash memory Data brief Features Hardware features • ARM Cortex™-M3 32-bit RISC core ■ 8 Kbytes of user RAM ■ 320 Kbytes of user Flash memory with OTP area: – 10-year data retention at 105°C, or 15

240x320

Abstract: FPD95320 LTPS 320x480
Contextual Info: FPD95320 320-Channel LTPS/CGS Driver with Partial Display Memory and MPL-1 Interface General Description Features The FPD95320 is a 320–channel LTPS/CGS driver with Partial Display Memory, a 18-bit RGB video interface and enhanced display quality. It provides 320 output source drivers

JESD22-b103

Abstract: ST32F320-M ST32F320 a102 transistor JESD22-B104 ST32F32 JESD22-A104 microcontroller interface with gsm module JESD22-A101 JESD22-A102
Contextual Info: ST32F320-M M2M MCU with 32-bit ARM Cortex M3 CPU and 320 Kbyte high-density Flash memory Data brief Features Hardware features • ARM Cortex™-M3 32-bit RISC core ■ 8 Kbytes of user RAM ■ 320 Kbytes of user Flash memory with OTP area: – 10-year data retention at 105°C, or 15

Contextual Info: ST21F320 Smartcard MCU with 320 Kbytes of high-density Flash memory Data brief Features Hardware features • Enhanced 8/16-bit CPU core with 16 Mbytes of linear addressable memory ■ 7 Kbytes of User RAM ■ 320 Kbytes of User Flash memory with OTP area:

M2118

Abstract: sck 0120 M2118-12 M2118-15 M2118-7 x 1-Bit Dynamic RAM
Contextual Info: intei M2118 FAMILY 16,384 x 1 BIT DYNAMIC RAM M ILITARY M2118-12 M2118-15 Maximum Access Time ns 120 150 Read, Write Cycle (ns) 270 320 Read-Modify Cycle (ns) 320 410 CAS Controlled Output is Three-State, TTL Compatible RAS Only Refresh 128 Refresh Cycles Required

2118 intel

Abstract: Intel 2118 2118 dynamic ram intel 2118 FAMILY tcp 8111 2118 ram S6447 2118-15 S6331 2118-10
Contextual Info: intei 2118 FAMILY 16,384 x 1 BIT DYNAMIC RAM 2118-10 2118-12 Maximum Access Time ns 100 120 150 Read, Write Cycle (ns) 235 270 320 Read-Modify-Write Cycle (ns) 285 320 410 Single +5V Supply, ±10% Tolerance CAS Controlled Output is Three-State, TTL Compatible

x 1-Bit Dynamic RAM

Contextual Info: in t e T 12118 FAMILY 16,384 x 1-BIT DYNAMIC RAM INDUSTRIAL 12118-15 12118-12 Maximum Access Time ns 120 150 Read, Write Cycle (ns) 270 320 Read-Modify Cycle (ns) 320 410 CAS Controlled Output is Three-State, TTL Compatible Single + 5 V Supply, ± 1 0 % Tolerance

MN152810

Abstract: SDIP052-P-0600 EP152810
Contextual Info: □ M N 152810 1Type MN152810 | ROM x8-bit 8K | RAM (x4-bit) 320 | Number of Instructions 115 | Minimum Instruction Execution Time 2.O^is at 1/12 frequency dividing (at 4.5 to 5.5V, 6MHz) | Interrupts •RESET | Timer Counter Timer Counter: 8-bit x 1 | Serial Interface

Contextual Info: intei M2118 FAMILY 16,384 x 1 BIT DYNAMIC RAM M IL IT A R Y M2118-4 120 270 320 Maximum Access Time ns Read, Write Cycle (ns) Read-Modify Cycle (ns) • Single +5V Supply, ±10% Tolerance M2118-7 150 320 410 ■ RAS Only Refresh ■ HMOS Technology ■ Low Power: 150 mW Max. Operating

x 1-Bit Dynamic RAM

Abstract: M2118 M2118-4 M2118-7
Contextual Info: in t e i M2118 FAMILY 16,384 x 1 BIT DYNAMIC RAM M ILITARY M2118-4 120 270 320 Maximum Access Time ns Read, Write Cycle <ns) Read-Modify Cycle (ns) M2118-7 150 320 410 • Single + 5 V Supply, ± 1 0 % Tolerance ■ RAS Only Refresh ■ HMOS Technology ■ Low Power: 150 mW Max. Operating

Intel 2118

Abstract: TC2-25 M2118 M2118-4 M2118-7
Contextual Info: in t e i M2118 FAMILY 16,384 x 1 BIT DYNAMIC RAM M ILITARY M2118-4 120 270 320 Maximum Access Time ns Read, Write Cycle <ns) Read-Modify Cycle (ns) M2118-7 150 320 410 • Single + 5 V Supply, ± 1 0 % Tolerance ■ RAS Only Refresh ■ HMOS Technology ■ Low Power: 150 mW Max. Operating

spc560p34

Abstract: SPC560P34L1 SPC560P40L1 SPC560P SPC560P40 SPC560 SPC560P40L3 CRC-16-CCIT 1421D
Contextual Info: SPC560P34L1, SPC560P34L3 SPC560P40L1, SPC560P40L3 32-bit Power Architecture based MCU with 320 KB Flash memory and 20 KB RAM for automotive chassis and safety applications Datasheet − production data Features • ■ Up to 64 MHz, single issue, 32-bit CPU core

Contextual Info: in te i 4002 320-BIT RAM AND 4-BIT OUTPUT PORT Four Registers of 20 4 Bit Characters Direct Interface to MCS-40 4 Bit Bus Output Port Low-Power TTL Compatible • 16 Pin Dual In-Line Package ■ Standard Operating Temperature Range of 0° to 70°C ■ Also Available With -40°

Contextual Info: C8051T620/621/320/321/322/323 Full Speed USB EPROM MCU Family Analog Peripherals High-Speed 8051 µC Core 10-Bit ADC C8051T620/320/321 only - - Up to 500 ksps Up to 21 external inputs VREF from on-chip VREF, external pin, Internal 1.8 V Regulator or VDD

Contextual Info: J IVIN6755240 / 320 MN6755240 / 320 1 Type 1 ROM x8-bit 2 4 K /3 2 K 1 RAM (x8-bit) 7 0 4 / 1024 1 Minimum Instruction Execution Time 0,33|JS (at 3 .3 to 5 .5 V , 1 2M H z) w ith M ain c lo c k operated 0.25ms (at 4 .2 to 5 .5 V , 1 6M H z) 122ms (at 3 .3 to 5 .5 V , 3 2 .7 6 8 k H z)

MN101E01K

Abstract: MN101E01L MN101E01M QFP100-P-1818B
Contextual Info: MN101E01K, MN101E01L, MN101E01M Type ROM x× 8-bit MN101E01K (under development) MN101E01L (under development) MN101E01M (under development) 256 K 320 K 384 K 10 K 14 K 24 K External memory can be expanded RAM (×× 8-bit) External memory can be expanded

RC clock generator 12MHz

Abstract: QFP128 MN6755240 MN6755320 QFP124-P-2828 QFP128-P-1818
Contextual Info: □ MN6755240 / 320 M N 6755240 / 320 1 Type > ROM x8-bit 2 4 K /3 2 K 1 RAM (xB-bit) 7 0 4 / 1024 1 Minimum Instruction Execution Time ' 0,33|JS (at 3 .3 to 5 .5 V , 12M H z) w ith M ain C lock operated 0 .2 5 ms (at 4 .2 to 5 .5 V , 1 6M Hz) 1 2 2 ms (at 3 .3 to 5 .5 V , 32.7 68 k H z)

Contextual Info: MN101E01L Type MN101E01L under development ROM (x×8-bit) 320 K External memory can be expanded RAM (××8-bit) 14 K External memory can be expanded Package Minimum Instruction Execution Time QFP100-P-1818B *Pb free 0.625 µs (at 3.0 V to 3.6 V, 32 MHz)

Contextual Info: MN101E01K, MN101E01L, MN101E01M Type ROM x× 8-bit MN101E01K MN101E01L MN101E01M (under planning) 256 K 320 K 384 K 10 K 14 K 24 K External memory can be expanded RAM (×× 8-bit) External memory can be expanded Package Minimum Instruction Execution Time

Contextual Info: MN101E01K, MN101E01L, MN101E01M Type ROM x× 8-bit MN101E01K MN101E01L MN101E01M (under development) 256 K 320 K 384 K 10 K 14 K 20 K External memory can be expanded RAM (×× 8-bit) External memory can be expanded Package Minimum Instruction Execution Time

MN101E01K

Abstract: MN101E01L MN101E01M QFP100-P-1818B
Contextual Info: MN101E01K, MN101E01L, MN101E01M Type ROM x× 8-bit MN101E01K MN101E01L MN101E01M (under development) 256 K 320 K 384 K 10 K 14 K 20 K External memory can be expanded RAM (×× 8-bit) External memory can be expanded Package Minimum Instruction Execution Time