30A00 Search Results

CE203

Contextual Info: □PM DPE8M656 Dense-Pac Microsystems. Inc. 16K X 16 CMOS EEPROM MODULE O DESCRIPTION: The D PE8M 656 is a high-performance Electrically Erasable and Programmable Read O nly M em ory EEPRO M module and may be organized as 16K X 16 or 32 K X 8. The module is built with four low-power C M O S 8K X 8 EEPROM s

I0112

Abstract: Dense-Pac Microsystems
Contextual Info: DPE41257 COPM7 Dense-Pac Microsystems, Inc. ^ 32 K X 8 C M O S EEPR O M M O D U L E NOT RECOMENDED FOR NEW DESIGNS D ESC R IP TIO N : The D P E41257 is a high-performance Electrically Erasable and Program able Read O n ly M em ory EEPROM module and is organized as a 32K X 8

Contextual Info: ► DPS1026 64K X 16 CMOS SRAM MODULE Dense-Pac Microsystems, Inc. 0 NOT RECOMMENDED FOR NEW DESIGNS DESCRIPTION: The DPS1026 is a 64K X 16 high-speed, low-power static RAM module comprised of sixteen 64K X 1 monolithic SRAM 's, and decoupling capacitors surface mounted on a thick film ceramic substrate.

Contextual Info: DPS92256 Dense-Pac Microsystems, Inc. ^ 32K X 8 CM OS SRAM MONOLITHIC D ESCR IPTIO N : The D PS92256 is a 32K X 8 Static Random Access Memory SRAM fabricated with a C M O S silicon gate process. The memory utilizes asynchronous circuitry and may be maintained in any state for an indefinite

30021

Abstract: L48C L41C IC L44C DATASHEET L30C l31c L43C ORSO42G5 ORSO82G5 ORT42G5
Contextual Info: ORCA ORSO42G5 and ORSO82G5 0.6 - 2.7 Gbps SONET Backplane Interface FPSCs August 2005 Data Sheet Introduction Lattice has extended its family of high-speed serial backplane devices with the ORSO42G5 and ORSO82G5 devices. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the ORSO42G5 and

Contextual Info: AT18V8Z Features • 20-pin Universal EPLD • Virtually Zero Standby Power • Functional Replacement for Common 20-Pin Programmable Devices Io l = 24 mA • High Performance CMOS EPROM Cell Technology Erasable Reconfigurable 100% Testable • 25 ns and 35 ns Max Propagation Delay Commercial

Contextual Info: 64KX4 BASED Dense-Pac Microsystems, inc. C M O S SRAM FAM ILY DESCRIPTION: The Dense-Pac 64K X4 Based Fam ily consists of static ra n d o m a c c e s s m e m o rie s S R A M S o rg a n iz e d as described below. T h ese m em ories are ideally suited for use in large

Contextual Info: □PM Dense-Pac Microsystems, Inc. DPS41288 1 28 K X 8 C M O S S R A M M O D U L E O DESCRIPTION: The DPS41288 is a one m egabit Static Random Access M em o ry SRAM , com p le te w ith m em ory interface logic and on-board capacitor, organized as 128K X 8

Contextual Info: □PM . Dense-Pac Microsystems Inc. DPS32M8A ^ HICH SPEED 32K X 8 CMOS SRAM MONOLITHIC ADVANCED INFORMATION DESCRIPTION: The DPS32M8A is a 32K X 8 CMOS Static Random Access Memory SRAM . The memory utilizes asynchronous circuitry and may be maintained in any

JS28F512M29

Abstract: js28f256m29 js28f256 JS28F512 pc28f00am29ew JS28F00AM29EW pc28f00am29 js28f00 PC28F00AM29EWHA JS28F256M29EWL
Contextual Info: Numonyx Axcell™ M29EW Datasheet 256-Mbit, 512-Mbit, 1-Gbit, 2-Gbit x8/x16, uniform block 3 V supply flash memory Features „ „ „ „ „ „ „ Supply voltage — VCC = 2.7 to 3.6 V for Program, Erase and Read — VCCQ = 1.65 to 3.6 V for I/O buffers

Contextual Info: DPS257 16KX 16 CMOS SRAM MODULE NOT RECOMENDED FOR NEW DESIGNS Dense-Pac Microsystems, Inc. O D ESC R IP TIO N : The DPS257 is a 16K X 16 Static Random Access Memory SRAM module, using sixteen CM O S 16K X 1 SRAMs. The memory utilizes asynchronous circuitry

Contextual Info: DPS384 □PM Dense-Pac Microsystems, Inc. 64K X 6 CMOS SRAM MODULE NOT RECOMMENDED FOR NEW DESIGNS D ESC R IPT IO N : The DPS384 is a 64K X 6 high-speed, low-power static RA M module comprised of six 64K X 1 m onolithic SR A M 's, and decoupling capacitors

Contextual Info: □PM Dense-Pac Microsystems, Inc. DPS8M624 6 4K X 16 CM OS SRAM MODULE O DESCRIPTION: The DPS8M624 is a one megabit Static Random Access M em ory SRAM , com plete w ith memory interface logic and on-board capacitors, organized as 64K X 16 bits. The DPS8M624 is ideally suited for high performance

Contextual Info: DPE8M628 □PM Dense-Pac Microsystems, Inc. O 8K X 16 CMOS EEPROM MODULE DESCRIPTION: The DPE8M628 is a high-performance Electrically Erasable and Programmable Read Only Memory EEPRO M module and may be organized as 8K X 16 or 16K X 8. The module is built with two low-power CM O S 8K X 8 EEPROM s

Spansion S29GL512N11

Contextual Info: S29GLxxxN MirrorBitTM Flash Family S29GL512N, S29GL256N, S29GL128N 512 Megabit, 256 Megabit, and 128 Megabit, 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit process technology ADVANCE INFORMATION Datasheet Distinctive Characteristics Architectural Advantages

Contextual Info: S29GL-N MirrorBit Flash Family S29GL512N, S29GL256N, S29GL128N 512 Megabit, 256 Megabit, and 128 Megabit, 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit Process Technology S29GL-N Cover Sheet Data Sheet This product family has been retired and is not recommended for designs. For new and current designs,

a22t

Abstract: S19G S29GL-N
Contextual Info: S29GL-N MirrorBit Flash Family S29GL512N, S29GL256N, S29GL128N 512 Megabit, 256 Megabit, and 128 Megabit, 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit™ Process Technology Data Sheet Notice to Readers: This document states the current technical specifications

S29GL-N

Abstract: 1E300
Contextual Info: S29GL512/256/128N MirrorBit Flash Family S29GL512N, S29GL256N, S29GL128N 512 Megabit, 256 Megabit, and 128 Megabit, 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit™ Process Technology ADVANCE INFORMATION Data Sheet Notice to Readers: The Advance Information status indicates that this

7be0

Contextual Info: Numonyx Axcell™ M29EW Datasheet 256-Mbit, 512-Mbit, 1-Gbit, 2-Gbit x8/x16, uniform block 3 V supply flash memory Features „ „ „ „ „ „ „ Supply voltage — VCC = 2.7 to 3.6 V for Program, Erase and Read — VCCQ = 1.65 to 3.6 V for I/O buffers

AD30102

Abstract: E3P15
Contextual Info: ORCA ORT42G5 and ORT82G5 06 to 3.7 Gbits/s XAUI and FC FPSCs March 2004 Data Sheet Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the

ORCA ORT42G5

Contextual Info: ORCA ORT42G5 and ORT82G5 3.7 Gbits/s XAUI and 4.25 Gbits/s FC FPSCs November 2003 Data Sheet Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the

AL437

Abstract: L97c L235C L103T L41C L140C L94C l165c L239C L43C
Contextual Info: ORCA ORSPI4 Dual SPI4 Interface and High-Speed SERDES FPSC November 2003 Preliminary Data Sheet Lattice Semiconductor has developed a next-generation FPSC targeted at high-speed data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the ORSPI4 FPSC contains two

L67c

Abstract: L41C l44c L71C l75c transistor l57c IC L44C DATASHEET l31c L47c l51c
Contextual Info: ORCA ORT42G5 and ORT82G5 06 to 3.7 Gbits/s XAUI and FC FPSCs February 2004 Data Sheet Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the

S1026

Contextual Info: DPS1026 □PM_ _Microsystems, tnc^ Dense-Pac v 64K X 16 C M O S S R A M M O D U L E NOT RECOMMENDED FOR NEW DESIGNS DESCRIPTION: The DPS1026 is a 64K X 16 high-speed, low-power static RAM module comprised of sixteen 64K X 1 monolithic SRAM 's, and decoupling capacitors