SiS301
Abstract: bt815 SILICON INTEGRATED SYSTEMS SiS300 1Mx16x4 LCD 320X200 CR10 CR14 CR16 CR18
Text: SiS300 2D/3D/Video/DVD Accelerator SiS300 2D/3D/Video/DVD Accelerator Preliminary Rev. 0.3 March 23, 1999 This specification is subject to change without notice. Silicon Integrated Systems Corporation assumes no responsibility for any errors contained herein.
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SiS300
128-bit
SiS301
bt815
SILICON INTEGRATED SYSTEMS
1Mx16x4
LCD 320X200
CR10
CR14
CR16
CR18
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sekisui 5760
Abstract: sis950 SiS chipset 486 SEAGATE st51080n Bt848KPF KSV884T4A1A-07 lad1 5vdc SiS chipset SiS301 kingmax usb flash drive
Text: SiS540 Super 7 2D/3D Ultra-AGPTM Single Chipset Content Figure .vi Table. vii
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SiS540
sekisui 5760
sis950
SiS chipset 486
SEAGATE st51080n
Bt848KPF
KSV884T4A1A-07
lad1 5vdc
SiS chipset
SiS301
kingmax usb flash drive
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FMR01
Abstract: CM06 CM10 fmr16
Text: R8C/2D Group Program ROM Rewrite Using EW0 Mode R8C/2D Group Program ROM Rewrite Using EW0 Mode 1. Abstract This document describes the rewrite program setting process and application example of the program ROM using EW0 mode. 2. Introduction The application example described in this document applies to the following MCU:
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REJ05B1103-0100/Rev
FMR01
CM06
CM10
fmr16
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY Notice: This is not a final specification. Some parametric limits are subject to change. R8C/2C Group, R8C/2D Group RENESAS MCU 1. REJ03B0183-0020 Rev.0.20 Sep 15, 2006 Overview 1.1 Features The R8C/2C Group and R8C/2D Group of single-chip MCUs incorporates the R8C/Tiny Series CPU core,
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REJ03B0183-0020
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AN12
Abstract: AN13 AN14 AN15 AN19 02C1h-02C0h
Text: R8C/2D Group A/D Converter in Single Sweep Mode R8C/2D Group A/D Converter in Single Sweep Mode 1. Abstract This document describes a program for the A/D converter in single sweep mode. 2. Introduction The application example described in this document applies to the following MCU and parameter s :
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REJ05B1065-0100/Rev
AN12
AN13
AN14
AN15
AN19
02C1h-02C0h
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0072H
Abstract: No abstract text available
Text: PRELIMINARY Notice: This is not a final specification. Some parametric limits are subject to change. R8C/2C Group, R8C/2D Group RENESAS MCU 1. REJ03B0183-0030 Rev.0.30 Dec 22, 2006 Overview 1.1 Features The R8C/2C Group and R8C/2D Group of single-chip MCUs incorporates the R8C/Tiny Series CPU core,
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REJ03B0183-0030
0072H
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Untitled
Abstract: No abstract text available
Text: SN54AHCT74, SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCLS263N – DECEMBER 1995 – REVISED JULY 2003 3 12 4 11 5 10 6 9 7 8 VCC 2CLR 2D 2CLK 2PRE 2Q 2Q 1D 1CLK 1PRE 1Q 1Q 14 1D 1 2 13 2CLR 3 12 2D 4 11 2CLK 5 10 2PRE
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SN54AHCT74,
SN74AHCT74
SCLS263N
000-V
A114-A)
A115-A)
SN54AHCT74
sgyc003d
scyb017a
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A115-A
Abstract: C101 SN54AHCT74 SN74AHCT74 SCLS263N
Text: SN54AHCT74, SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCLS263N – DECEMBER 1995 – REVISED JULY 2003 3 12 4 11 5 10 6 9 7 8 VCC 2CLR 2D 2CLK 2PRE 2Q 2Q 1D 1CLK 1PRE 1Q 1Q 14 1D 1 2 13 2CLR 3 12 2D 4 11 2CLK 5 10 2PRE
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SN54AHCT74,
SN74AHCT74
SCLS263N
SN54AHCT74
SN74AHCT74
A115-A
C101
SN54AHCT74
SCLS263N
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A115-A
Abstract: C101 SN54AHCT74 SN74AHCT74
Text: SN54AHCT74, SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCLS263N – DECEMBER 1995 – REVISED JULY 2003 3 12 4 11 5 10 6 9 7 8 VCC 2CLR 2D 2CLK 2PRE 2Q 2Q 1D 1CLK 1PRE 1Q 1Q 14 1D 1 2 13 2CLR 3 12 2D 4 11 2CLK 5 10 2PRE
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SN54AHCT74,
SN74AHCT74
SCLS263N
SN54AHCT74
SN74AHCT74
A115-A
C101
SN54AHCT74
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Untitled
Abstract: No abstract text available
Text: SN54AHCT74, SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCLS263N – DECEMBER 1995 – REVISED JULY 2003 3 12 4 11 5 10 6 9 7 8 VCC 2CLR 2D 2CLK 2PRE 2Q 2Q 1D 1CLK 1PRE 1Q 1Q 14 1D 1 2 13 2CLR 3 12 2D 4 11 2CLK 5 10 2PRE
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SN54AHCT74,
SN74AHCT74
SCLS263N
000-V
A114-A)
A115-A)
SN54AHCT74
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Abstract: No abstract text available
Text: SN54AHCT74, SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCLS263N – DECEMBER 1995 – REVISED JULY 2003 3 12 4 11 5 10 6 9 7 8 VCC 2CLR 2D 2CLK 2PRE 2Q 2Q 1D 1CLK 1PRE 1Q 1Q 14 1D 1 2 13 2CLR 3 12 2D 4 11 2CLK 5 10 2PRE
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SN54AHCT74,
SN74AHCT74
SCLS263N
000-V
A114-A)
A115-A)
SN54AHCT74
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A115-A
Abstract: C101 SN54AHCT74 SN74AHCT74
Text: SN54AHCT74, SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCLS263N – DECEMBER 1995 – REVISED JULY 2003 3 12 4 11 5 10 6 9 7 8 VCC 2CLR 2D 2CLK 2PRE 2Q 2Q 1D 1CLK 1PRE 1Q 1Q 14 1D 1 2 13 2CLR 3 12 2D 4 11 2CLK 5 10 2PRE
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SN54AHCT74,
SN74AHCT74
SCLS263N
SN54AHCT74
SN74AHCT74
A115-A
C101
SN54AHCT74
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A115-A
Abstract: C101 SN54AHCT74 SN74AHCT74
Text: SN54AHCT74, SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCLS263N – DECEMBER 1995 – REVISED JULY 2003 3 12 4 11 5 10 6 9 7 8 VCC 2CLR 2D 2CLK 2PRE 2Q 2Q 1D 1CLK 1PRE 1Q 1Q 14 1D 1 2 13 2CLR 3 12 2D 4 11 2CLK 5 10 2PRE
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SN54AHCT74,
SN74AHCT74
SCLS263N
SN54AHCT74
SN74AHCT74
A115-A
C101
SN54AHCT74
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Untitled
Abstract: No abstract text available
Text: SN54AHCT74, SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCLS263N – DECEMBER 1995 – REVISED JULY 2003 3 12 4 11 5 10 6 9 7 8 VCC 2CLR 2D 2CLK 2PRE 2Q 2Q 1D 1CLK 1PRE 1Q 1Q 14 1D 1 2 13 2CLR 3 12 2D 4 11 2CLK 5 10 2PRE
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SN54AHCT74,
SN74AHCT74
SCLS263N
000-V
A114-A)
A115-A)
SN54AHCT74
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A115-A
Abstract: C101 SN54AHCT74 SN74AHCT74
Text: SN54AHCT74, SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCLS263N – DECEMBER 1995 – REVISED JULY 2003 3 12 4 11 5 10 6 9 7 8 VCC 2CLR 2D 2CLK 2PRE 2Q 2Q 1D 1CLK 1PRE 1Q 1Q 14 1D 1 2 13 2CLR 3 12 2D 4 11 2CLK 5 10 2PRE
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SN54AHCT74,
SN74AHCT74
SCLS263N
SN54AHCT74
SN74AHCT74
A115-A
C101
SN54AHCT74
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Untitled
Abstract: No abstract text available
Text: 2D Scaler IP Core User’s Guide August 2013 IPUG88_01.2 Table of Contents Chapter 1. Introduction . 4 Quick Facts . 4
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IPUG88
YCbCr422
1280x720
720x480
1920x1080
LFXP2-30E-7F484C
E2011
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ci 1458 texas
Abstract: No abstract text available
Text: SN54AHCT74, SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCLS263M – DECEMBER 1995 – REVISED SEPTEMBER 2002 3 12 4 11 5 10 6 9 7 8 VCC 2CLR 2D 2CLK 2PRE 2Q 2Q 1D 1CLK 1PRE 1Q 1Q 14 1D 1 2 13 2CLR 3 12 2D 4 11 2CLK 5 10 2PRE
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SN54AHCT74,
SN74AHCT74
SCLS263M
000-V
A114-A)
A115-A)
SN54AHCT74
SN74AHCT74,
SN74AHCT74RGYR
ci 1458 texas
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R5F212DCSNFP
Abstract: R5F212CCSDFP R5F212CASNFP R5F212C7SDFP R5F212C7SNFP R5F212C8SDFP R5F212C8SNFP R5F212CASDFP R5F212CCSNFP R5F212DASDFP
Text: R8C/2C Group, R8C/2D Group RENESAS MCU 1. REJ03B0183-0100 Rev.1.00 Feb 09, 2007 Overview 1.1 Features The R8C/2C Group and R8C/2D Group of single-chip MCUs incorporates the R8C/Tiny Series CPU core, employing sophisticated instructions for a high level of efficiency. With 1 Mbyte of address space and is capable of
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REJ03B0183-0100
R5F212DCSNFP
R5F212CCSDFP
R5F212CASNFP
R5F212C7SDFP
R5F212C7SNFP
R5F212C8SDFP
R5F212C8SNFP
R5F212CASDFP
R5F212CCSNFP
R5F212DASDFP
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A115-A
Abstract: C101 SN54AHCT74 SN74AHCT74 hb74
Text: SN54AHCT74, SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCLS263M – DECEMBER 1995 – REVISED SEPTEMBER 2002 3 12 4 11 5 10 6 9 7 8 VCC 2CLR 2D 2CLK 2PRE 2Q 2Q 1D 1CLK 1PRE 1Q 1Q 14 1D 1 2 13 2CLR 3 12 2D 4 11 2CLK 5 10 2PRE
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SN54AHCT74,
SN74AHCT74
SCLS263M
SN54AHCT74
SN74AHreproduction
A115-A
C101
SN54AHCT74
SN74AHCT74
hb74
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Untitled
Abstract: No abstract text available
Text: SN54AHCT74, SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCLS263N – DECEMBER 1995 – REVISED JULY 2003 3 12 4 11 5 10 6 9 7 8 VCC 2CLR 2D 2CLK 2PRE 2Q 2Q 1D 1CLK 1PRE 1Q 1Q 14 1D 1 2 13 2CLR 3 12 2D 4 11 2CLK 5 10 2PRE
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SN54AHCT74,
SN74AHCT74
SCLS263N
000-V
A114-A)
A115-A)
SN54AHCT74
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Untitled
Abstract: No abstract text available
Text: SN54AHCT74, SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCLS263N – DECEMBER 1995 – REVISED JULY 2003 3 12 4 11 5 10 6 9 7 8 VCC 2CLR 2D 2CLK 2PRE 2Q 2Q 1D 1CLK 1PRE 1Q 1Q 14 1D 1 2 13 2CLR 3 12 2D 4 11 2CLK 5 10 2PRE
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SN54AHCT74,
SN74AHCT74
SCLS263N
000-V
A114-A)
A115-A)
SN54AHCT74
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A115-A
Abstract: C101 SN54AHCT74 SN74AHCT74 hb74 marking
Text: SN54AHCT74, SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCLS263N – DECEMBER 1995 – REVISED JULY 2003 3 12 4 11 5 10 6 9 7 8 VCC 2CLR 2D 2CLK 2PRE 2Q 2Q 1D 1CLK 1PRE 1Q 1Q 14 1D 1 2 13 2CLR 3 12 2D 4 11 2CLK 5 10 2PRE
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SN54AHCT74,
SN74AHCT74
SCLS263N
SN54AHCT74
SN74AHCT74
A115-A
C101
SN54AHCT74
hb74 marking
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CV413
Abstract: g150-2d G150/2D 19S8
Text: Ref.: G150/2D Cold-Cathode Gas-Filled Triode Code: G150/2D CV4I3 T h e G 1 50/ 2D cold cathode, gas-filled t rio d e has an activated cathode g iv in g a lo w m aintaining voltage, to g e th e r w ith a go o d life perform ance. M E C H A N IC A L D A T A
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G150/2D
G150/2D
CV413)
G150/2Dâ
CV413
g150-2d
19S8
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2D 8
Abstract: cold cathode GI-50
Text: GI50/2D Cold Cathode Gas-Filled Relay GI50/2D C old cathode, 3 electrode, gas-filled valve for use as a relay. This valve has sim ilar electrical characteristics to the 4 3 I3 C G 150/1A but has non-interchangeable trigger and cathode electrodes. D IM E N S IO N S .
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GI50/2D
43I3C
GI50/2Dâ
37/l6
2D 8
cold cathode
GI-50
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