29MAY200 Search Results

Contextual Info: THIS DRAWING C IS UNPUBLISHED. RELEASED BY C O P Y R I G H T 2009 TYCO ELECTRONICS CORPORATION. FOR ALL W PUBLICATION INTERNATIONAL RIGHTS LOC DIST REVISIONS B RESERVED. LTR DESCRIPTION DWN DATE ECR-06-0078I 5 30NOV2000 29MAY200 I 5MAR2002 29MAR2006 E C R -09 - 02509

T568A

Abstract: T568B AMP Tyco JT 2,8
Contextual Info: THIS £ L DRAWIN G IS UNPUBLISHED. BY C O P Y R I G H T 20 RELEASED TYCO ELECTRONICS CORPORATION. FOR ALL 20 PUBLICATION R 1G H T S LOC R E V ISIONS DIST RESERVED. LTR DESCRIPTION DATE APVD DWN E C O - 06 - 0 2 5 5 9 4 30JAN2007 JM SH REV, 29MAY2008 JB SH

LM2904DG4

Abstract: l358 LM2904DE4 LM358ADR LM358AP LM158 LM158A LM258 LM258A LM2904
Contextual Info: LM158, LM158A, LM258, LM258A LM358, LM358A, LM2904, LM2904V DUAL OPERATIONAL AMPLIFIERS SLOS068P − JUNE 1976 − REVISED SEPTEMBER 2004 D D D D D LM158, LM158A . . . JG PACKAGE LM258, LM258A . . . D, DGK, OR P PACKAGE LM358 . . . D, DGK, P, PS, OR PW PACKAGE

Contextual Info: SN54ABT541, SN74ABT541B OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS093K – JANUARY 1991 – REVISED OCTOBER 1998 D D D D D State-of-the-Art EPIC-ΙΙB  BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17

Contextual Info: KEYING OPTION D 2 . S E A L I N G S U R F A C E , NO W I T N E S S L I N E S OR DAMAGE P E R M I T T E D . 3. D R A P T W I T H I N T O L E R E N C E . 4 \ T H I S D I M E N S I O N A P P L I E S TO K E Y I N G O P T I O N S A , B, 0 , AND D. T H I S D I M E N S I O N TO BE M E A S U R E D AT THE 1 3 . 5 5 D I M E N S I O N .

Contextual Info: TS5A3160 1-Ω SPDT ANALOG SWITCH 5-V/3.3-V SINGLE-CHANNEL 2:1 MULTIPLEXER/DEMULTIPLEXER www.ti.com SCDS216 – OCTOBER 2005 FEATURES APPLICATIONS • • • • • • • • • • • • • • • • • • • • Isolation in the Powered-Off Mode, V+ = 0

TPIC6B595N

Abstract: TPIC6B595 TPIC6B595DW TPIC6B595DWG4 TPIC6B595DWR TPIC6B595DWRG4
Contextual Info: TPIC6B595 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS032A − JULY 1995 − REVISED MAY 2005 D Low rDS on . . . 5 Ω Typical D Avalanche Energy . . . 30 mJ D Eight Power DMOS-Transistor Outputs of D D D D DW OR N PACKAGE (TOP VIEW) NC VCC SER IN DRAIN0 DRAIN1

Contextual Info: TDA7491MV 25 W mono BTL class-D audio amplifier Datasheet - production data Description The TDA7491MV is a mono BTL class-D audio amplifier with single power supply designed for LCD TVs and monitors. Thanks to the high efficiency and an exposed-pad-down EPD package no heatsink is

02APR

Contextual Info: M48Z35 M48Z35Y 256 Kbit 32 Kbit x 8 ZEROPOWER SRAM Features • Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ READ cycle time equals WRITE cycle time ■ Automatic power-fail chip deselect and WRITE protection ■ WRITE protect voltages:

M28W320BB

Abstract: M28W320BT
Contextual Info: M28W320BT M28W320BB 32 Mbit 2Mb x16, Boot Block 3V Supply Flash Memory FEATURES SUMMARY • SUPPLY VOLTAGE Figure 1. Packages – VDD = 2.7V to 3.6V Core Power Supply – VDDQ= 1.65V to 3.6V for Input/Output – VPP = 12V for fast Program (optional) ■

B1K Potentiometer

Abstract: jtag cable lattice Schematic hw-dln-3c ispPAC-POWR0607 Mini USB 8-pin B-Type HW-DLN-3C jtag cable lattice Schematic ISPPAC-POWR605-01SN24I FT2232D schematic ispDOWNLOAD Cable lattice hw-dln-3c AN6062
Contextual Info:  ProcessorPM Development Kit User’s Guide July 2009 Revision: EB45_01.0  Lattice Semiconductor ProcessorPM Development Kit User’s Guide Introduction Thank you for choosing the Lattice Semiconductor ProcessorPM Development Kit! This user’s guide describes how to start using the ProcessorPM Development Kit, an easy-to-use platform for evaluating and designing with the ProcessorPM-POWR605 Processor Power Manager . Along with the evaluation

smd E6

Contextual Info: Technical Data Sheet 1206 Package Chip LED with Inner Lens 11-21/R6C-AR2S2B/2T Features ․Package in 8mm tape on 7〞diameter reel. ․Compatible with automatic placement equipment. ․Compatible with infrared and vapor phase reflow solder process. ․Mono-color type.

BCR10

Abstract: M69KM096AA
Contextual Info: M69KM096AA 64 Mbit 4 Mb x16 , 83MHz clock rate, 1.8V Supply, Multiplexed I/O, Bare Die, Burst PSRAM Preliminary Data Feature summary • Supply Voltage – VCC = 1.7 to 1.95V core supply voltage – VCCQ = 1.7 to VCC for I/O buffers ■ Multiplexed Address/Data bus

Contextual Info: M68AW031AL 256 Kbit 32K x8 3.0V Asynchronous SRAM FEATURES SUMMARY • SUPPLY VOLTAGE: 2.7 to 3.3V ■ 32K x 8 bits SRAM with OUTPUT ENABLE ■ EQUAL CYCLE and ACCESS TIME: 70ns ■ LOW STANDBY CURRENT ■ LOW VCC DATA RETENTION: 1.5V ■ TRI-STATE COMMON I/O

marking 1301 sot-23

Abstract: A115-A C101 SN74AUP1G80
Contextual Info: SN74AUP1G80 LOW-POWER SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP www.ti.com SCES593B – JULY 2004 – REVISED JULY 2005 FEATURES • • • • • • • • • • Available in the Texas Instruments NanoStar and NanoFree™ Packages Low Static-Power Consumption

67-21B EVERLIGHT

Contextual Info: EVERLIGHTELECTRONICS CO.,LTD. Technical Data Sheet TOP View LEDs With Lens 67-21B/G6C-BR1S2B/BT Features ․P-LCC-2 package. ․High flux output. ․High current capability. ․White package. ․Optical indicator. ․Colorless clear window. ․Ideal for backlight and light pipe application.

ST1S03APMR

Abstract: schematic diagram dc-dc 12 to 5v/1,5A JESD97 ST1S03A ST1S03AIPMR ST1S03AIPUR ST1S03APUR
Contextual Info: ST1S03A 1.5A, 1.5 MHz Adjustable, with inhibit function Step-down switching regulator in DFN6 3x3 Features • Step-down current mode PWM 1.5MHz DCDC converter ■ 2% DC output voltage tolerance ■ Internal soft start for start-up current limitation and power on delay of 50-100µs

Contextual Info: TL16C554A, TL16C554AI ASYNCHRONOUSĆCOMMUNICATIONS ELEMENT ą ąą SLLS509C − AUGUST 2001 − REVISED MARCH 2006 D Integrated Asynchronous-Communications D D D D D D D D Element Consists of Four Improved TL16C550C ACEs Plus Steering Logic In FIFO Mode, Each ACE Transmitter and

Contextual Info: SN74LVC2G125-Q1 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES559A – MARCH 2004 – REVISED DECEMBER 2005 FEATURES • • • • • • • • • • 1 • Qualification in Accordance With AEC-Q100 (1) Qualified for Automotive Applications

Contextual Info: SN74ABT16373A-EP 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCBS810 – MARCH 2006 FEATURES • • • • • • • • • • • • • • 1 Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of

Contextual Info: SN74CBTD1G384 SINGLE FET BUS SWITCH WITH LEVEL SHIFTING www.ti.com SCDS066K – JULY 1998 – REVISED JUNE 2006 FEATURES • • • 5-Ω Switch Connection Between Two Ports TTL-Compatible Control Input Levels Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

Semikron Semitop 3

Abstract: SEMITOP 2 Package STG3P3M25N60 SEMITOP 3 Package SEMITOP 1 Package JESD97 vf-612 st IGBT G3P3M25N60 TS80C
Contextual Info: STG3P3M25N60 3 Phase inverter IGBT - SEMITOP 3 module PRELIMINARY DATA General features Type VCES STG3P3M25N60 600V VCE sat (Max) @ IC=7A, IC@80°C Ts=25°C < 2.5V 25A • N-channel very fast PowerMESH IGBT ■ Lower on-voltage drop (Vcesat) ■ Lower CRES / CIES ratio (no cross-conduction

C101

Abstract: TS5A63157YEPR TS5A63157YZPR
Contextual Info: TS5A63157 12-Ω SPDT ANALOG SWITCH 5-V/3.3-V SINGLE-CHANNEL 2:1 MULTIPLEXER/DEMULTIPLEXER www.ti.com SCDS203 – DECEMBER 2005 FEATURES APPLICATIONS • • • • • • • • • • • • • • • Overshoot and Undershoot Voltage Protection Isolation in Powered-Off Mode, V+ = 0

C101

Abstract: TS5A3160 TS5A3160DBVR TS5A3160YZPR marking code vnq TS5A3160DCKR
Contextual Info: TS5A3160 1-Ω SPDT ANALOG SWITCH 5-V/3.3-V SINGLE-CHANNEL 2:1 MULTIPLEXER/DEMULTIPLEXER www.ti.com SCDS216 – OCTOBER 2005 FEATURES APPLICATIONS • • • • • • • • • • • • • • • • • • • • Isolation in the Powered-Off Mode, V+ = 0