2565 EEPROM Search Results

DDR266A

Abstract: DDR266B M381L6423BT1 PC200
Contextual Info: M381L6423BT1 184pin Unbuffered DDR SDRAM MODULE 512MB DDR SDRAM MODULE 64Mx72(32Mx72*2 bank based on 32Mx8 DDR SDRAM) Unbuffered 184pin DIMM 72-bit ECC/Parity Revision 1.1 May. 2002 Rev. 1.1 May. 2002 184pin Unbuffered DDR SDRAM MODULE M381L6423BT1 Revision History

DDR266A

Abstract: DDR266B M381L6423BT1 PC200
Contextual Info: M381L6423BT1 184pin Unbuffered DDR SDRAM MODULE 512MB DDR SDRAM MODULE 64Mx72(32Mx72*2 bank based on 32Mx8 DDR SDRAM) Unbuffered 184pin DIMM 72-bit ECC/Parity Revision 1.0 December. 2001 Rev. 1.0 Dec. 2001 M381L6423BT1 184pin Unbuffered DDR SDRAM MODULE

Contextual Info: White Electronic Designs WED3EG7265S-JD3 PRELIMINARY* 512MB- 64Mx72 DDR SDRAM REGISTERED, w/PLL FEATURES DESCRIPTION Double-data-rate architecture The WED3EG7265S is a 64Mx72 Double Data Rate SDRAM memory module based on 256Mb DDR SDRAM component. The module consists of eighteen

NS-5 3105

Abstract: m 1305 M381L2923MT1
Contextual Info: M381L2923MT1 184pin Unbuffered DDR SDRAM MODULE 1GB DDR SDRAM MODULE 128Mx72(64Mx72*2 bank based on 64Mx8 DDR SDRAM) Unbuffered 184pin DIMM 72-bit ECC/Parity Revision 0.0 September. 2001 Rev. 0.0 Sep. 2001 M381L2923MT1 184pin Unbuffered DDR SDRAM MODULE

Contextual Info: 184PIN DDR266 Unbuffered DIMM 512MB With 32Mx8 CL2.5 TS64MLD72V6F5 Description Placement The TS64MLD72V6F5 is a 64M x 72bits Double Data Rate SDRAM high-density for DDR266. The TS64MLD72V6F5 consists of 18pcs CMOS 32Mx8 bits Double Data Rate SDRAMs in 66 pin TSOP-II 400mil

Crouzet Millenium 2 sa 20

Abstract: Crouzet xd26 crouzet millenium 2 PROGRAMMING crouzet millenium 2 SA 12 Crouzet Millenium 2 crouzet millenium 3 PROGRAMMING millenium 3 crouzet millenium 2 crouzet millenium cd12 3 crouzet CROUZET 88970041
Contextual Info: Evolution is a logical process ! 3rd generation of logic controllers at the core of your industry • Actual size ■ ■ ■ More memory for your applications More comfort : largest display on the market More modularity in the number of inputs/outputs More simplicity for programming

Contextual Info: White Electronic Designs W3EG7265S-JD3 PRELIMINARY* 512MB – 2x32Mx72 DDR SDRAM REGISTERED, w/PLL FEATURES DESCRIPTION Double-data-rate architecture The W3EG7265S is a 2x32Mx72 Double Data Rate SDRAM memory module based on 256Mb DDR SDRAM components. The module consists of eighteen 32Mx8 DDR

200-Mb

Abstract: 200Mb
Contextual Info: White Electronic Designs W3EG7265S-JD3 PRELIMINARY* 512MB – 2x32Mx72 DDR SDRAM REGISTERED, w/PLL FEATURES DESCRIPTION Double-data-rate architecture The W3EG7265S is a 2x32Mx72 Double Data Rate SDRAM memory module based on 256Mb DDR SDRAM components. The module consists of eighteen

DDR200

Abstract: DDR266A DDR266B M381L3223CTL
Contextual Info: M381L3223CTL 184pin Unbuffered DDR SDRAM MODULE 256MB DDR SDRAM MODULE 32Mx72 based on 32Mx8 DDR SDRAM Unbuffered 184pin DIMM 72-bit ECC/Parity Revision 0.3 May. 2002 Rev. 0.3 May. 2002 184pin Unbuffered DDR SDRAM MODULE M381L3223CTL Revision History Revision 0 (Oct. 2001)

Contextual Info: M381L2923MTL 184pin Unbuffered DDR SDRAM MODULE 1GB DDR SDRAM MODULE 128Mx72(64Mx72*2 bank based on 64Mx8 DDR SDRAM) Unbuffered 184pin DIMM 72-bit ECC/Parity Revision 0.2 Jan. 2002 Rev. 0.2 Jan. 2002 M381L2923MTL 184pin Unbuffered DDR SDRAM MODULE Revision History

Contextual Info: M381L3223CTL 184pin Unbuffered DDR SDRAM MODULE 256MB DDR SDRAM MODULE 32Mx72 based on 32Mx8 DDR SDRAM Unbuffered 184pin DIMM 72-bit ECC/Parity Revision 0.2 Jan. 2002 Rev. 0.2 Jan. 2002 184pin Unbuffered DDR SDRAM MODULE M381L3223CTL Revision History Revision 0 (Oct. 2001)

Contextual Info: SM572644574E8UP June 1, 2000 Revision History • June 1, 2000 Added Command Truth Table, Mode Register Table and notes. Modified waveforms Auto Refresh (CBR cycle and Power Down Mode and Clock Mask). • March 9, 2000 Modified DC characteristics on page 4.

DDR200

Abstract: DDR266 W3EG7234S-D3
Contextual Info: W3EG7234S-D3 -JD3 -AJD3 White Electronic Designs PRELIMINARY* 256MB - 32Mx72 DDR SDRAM REGISTERED, w/PLL FEATURES DESCRIPTION Double-data-rate architecture The W3EG7234S is a 32Mx72 Double Data Rate SDRAM memory module based on 128Mb DDR SDRAM component. The module consists of eighteen

DDR200

Abstract: DDR266 W3EG7234S-D3
Contextual Info: W3EG7234S-D3 -JD3 -AJD3 White Electronic Designs PRELIMINARY* 256MB - 32Mx72 DDR SDRAM REGISTERED, w/PLL FEATURES DESCRIPTION Double-data-rate architecture The W3EG7234S is a 32Mx72 Double Data Rate SDRAM memory module based on 128Mb DDR SDRAM component. The module consists of eighteen

DDR200

Abstract: DDR266 W3EG7265S-JD3
Contextual Info: White Electronic Designs W3EG7265S-JD3 PRELIMINARY* 512MB – 2x32Mx72 DDR SDRAM REGISTERED, w/PLL FEATURES DESCRIPTION Double-data-rate architecture The W3EG7265S is a 2x32Mx72 Double Data Rate SDRAM memory module based on 256Mb DDR SDRAM components. The module consists of eighteen 32Mx8 DDR

Contextual Info: White Electronic Designs WED3EG7265S-JD3 PRELIMINARY* 512MB – 64Mx72 DDR SDRAM REGISTERED, w/PLL FEATURES DESCRIPTION Double-data-rate architecture The WED3EG7265S is a 64Mx72 Double Data Rate SDRAM memory module based on 256Mb DDR SDRAM component. The module consists of eighteen

Contextual Info: V917565U24QB 128M x 72 HIGH PERFORMANCE REGISTERED DDR2 ECC SDRAM MODULE Features Description • 240-pin, registered dual in-line memory module • JEDEC standard 1.8V + 0.1V power supply • VDDQ=1.8V + 0.1V • Fast data transfer rate: PC2-3200, PC2-4200, or

Contextual Info: M381L2923MTL 184pin Unbuffered DDR SDRAM MODULE 1GB DDR SDRAM MODULE 128Mx72(64Mx72*2 bank based on 64Mx8 DDR SDRAM) Unbuffered 184pin DIMM 72-bit ECC/Parity Revision 0.2 Jan. 2002 Rev. 0.2 Jan. 2002 M381L2923MTL 184pin Unbuffered DDR SDRAM MODULE Revision History

DDR200

Abstract: DDR266A DDR266B
Contextual Info: M381L2923MTL 184pin Unbuffered DDR SDRAM MODULE 1GB DDR SDRAM MODULE 128Mx72(64Mx72*2 bank based on 64Mx8 DDR SDRAM) Unbuffered 184pin DIMM 72-bit ECC/Parity Revision 0.3 May. 2002 Rev. 0.3 May. 2002 M381L2923MTL 184pin Unbuffered DDR SDRAM MODULE Revision History

DDR333

Abstract: DDR400 HYMD512726B
Contextual Info: 128Mx72 bits Unbuffered DDR SDRAM DIMM HYMD512726B L 8J-D43/D4/J DESCRIPTION Preliminary Hynix HYMD512726B(L)8J-D43/D4/J series is unbuffered 184-pin double data rate Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 128Mx72 high-speed memory arrays. Hynix HYMD512726B(L)8JD43/D4/J series consists of eighteen 64Mx8 DDR SDRAM in 400mil TSOP II packages on a 184pin glass-epoxy substrate. Hynix HYMD512726B(L)8J-D43/D4/J series provide a high performance 8-byte interface in 5.25" width form factor of industry standard. It is suitable for easy interchange and addition.

Contextual Info: White Electronic Designs WED3EG7262S-D3 *ADVANCED 512MB- 64Mx72 DDR SDRAM UNBUFFERED FEATURES  Double-data-rate architecture  Bi-directional data strobes DQS  Differential clock inputs (CK & CK#)  Programmable Read Latency 2,2.5 (clock)  Programmable Burst Length (2,4,8)

Contextual Info: SU5723285D4E0CU August 20, 2004 Ordering Information Part Numbers Description Module Speed SM5723285D4E0CG 32Mx72 256MB , DDR, 184-pin DIMM, Registered, ECC, 16Mx8 based, DDR266A, 43.18mm, 22Ω DQ termination. PC2100 @ CL 2.0, 2.5 SB5723285D4E0CG 32Mx72 (256MB), DDR, 184-pin DIMM, Registered, ECC,

SM5726485D8D8CL01

Contextual Info: SU5726485D8D8CU01 July 20, 2006 Ordering Information Part Numbers Description Module Speed SM5726485D8D8CL01 64Mx72 512MB , DDR, 184-pin DIMM, Unbuffered, ECC, 64Mx8 Based (Stacked - two 32Mx8), DDR333B, 25.40mm, 22Ω DQ termination. PC2700 @ CL 2.5 SG5726485D8D8CL01

ft232am

Abstract: RS232 to parallel converter 5V RS422 USB 93C46 CRC16 FT8U232AM E005A 006-AE uart with auto tuning baud rate generator
Contextual Info: FT8U232AM U-UART - USB UltraBaud Data Transfer IC with RS232 / RS422 and CPU I/F Options FEATURES • Single Chip Multi-Function Data Transfer Virtual COM Port Drivers for – Solution Windows 98 and Windows 98 SE • RS232 link from 300 baud to 920K baud