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Treston House 195523 SPECIAL Spe Electrical Channel 56L 15A Under Wksfc Mtd, Outlets Facing Down \|Treston 195523 SPECIAL
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23SPECIAL Datasheets Context Search

Catalog Datasheet	MFG & Type	PDF	Document Tags
ic t805 Abstract: IMS T805-F20E inmos transputer inmos transputer T225 T425 T800 t225 Inmos t805 IMS T805-G20E MEMAD11 Text: SGS-THOMSON IMS T805E •HI 32-bit floating-point transputer - Extended temperature EATURES 32 bit architecture 50 ns internal cycle time 20 MIPS peak instruction rate 2.8 Mflops (peak) instruction rate Pin compatible with IMS T800 Floating Point Unit Debugging support	OCR Scan	PDF	T805E 32-bit ic t805 IMS T805-F20E inmos transputer inmos transputer T225 T425 T800 t225 Inmos t805 IMS T805-G20E MEMAD11
T225E Abstract: imst225 Text: _ 16-bit transputer FEATURES • 16 bit architecture ■ 33 ns internal cycle time ■ 30 MIPS peak instruction rate ■ Debugging support ■ 4 Kbytes on-chip static RAM ■ 60 Mbytes/sec sustained data rate to internal memory ■	OCR Scan	PDF	16-bit 64rrs 71E1237 T225E imst225
imst400 Abstract: 25f0 T222 transputer FP 1117 aj T400 clock FP 801 transputer T222 T225 inmos transputer T225 Text: SGS-THOMSON IMS T225 L K g lT IM M ! 16 -bit transputer EATURES 16 bit architecture 33 ns internal cycle tim e 30 M IPS pea k instruction rate D ebugging support 4 Kbytes on-chip static RAM 60 M bytes/sec sustained data rate to internal m em ory 64 Kbytes directly addressable external m em ory	OCR Scan	PDF	16-bit IMST400 25f0 T222 transputer FP 1117 aj T400 clock FP 801 transputer T222 T225 inmos transputer T225
AD T805 Abstract: B50R MEMAD11 T805 IMS T805-F25S IMST805 transputer Inmos t805 inmos transputer T225 inmos transputer T425 Text: 32-bit floating-point transputer FEATURES • 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ 3.6 Mflops (peak) instruction rate ■ ■ Pin compatible with IMS T800, IMS T425, IMS T400 and IMS T414 Debugging support	OCR Scan	PDF	32-bit AD T805 B50R MEMAD11 T805 IMS T805-F25S IMST805 transputer Inmos t805 inmos transputer T225 inmos transputer T425
t425 Abstract: SGS thomson power schottky 8000000C sgs thomson 23-F1 KJH T6 IMST425 inmos transputer T425 Text: w # S G S -T H O M S O N IM < 5 , kT # D ïiin g M iiiL iK g T Â E g n e i ,M & _ T 4 2 5 32-bit transputer FEATURES 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate Pin compatible with IMS T805, IMS T800, IMST400 and IMS T414	OCR Scan	PDF	32-bit MST400 PGA/84pin PLCC/100 t425 SGS thomson power schottky 8000000C sgs thomson 23-F1 KJH T6 IMST425 inmos transputer T425
CQ 2AF1 Abstract: IMST425 IMS T400 Inmos T222 Text: 32-bit transputer FEATURES • 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414 ■ Debugging support ■ 4 Kbytes on-chip static RAM ■ 100 Mbytes/sec sustained data rate to internal	OCR Scan	PDF	32-bit CQ 2AF1 IMST425 IMS T400 Inmos T222
Untitled Abstract: No abstract text available Text: 2 Pin designations 2 Pin designations Signal names are prefixed by not if they are active low, otherwise they are active high. Pinout details for various packages are given in section 9. Pin In/Out Function VCC, GND Power supply and return CapPlus, CapMinus	OCR Scan	PDF	23Special IMST225
inmos transputer T225 Abstract: inmos transputer T425 inmos T225 T400 clock transputer IMST222 2U06 T225 801C IMST225 Text: /^ T A S G S -T H O M S O N T Ë , « fô tm IMS T225 ilg ïïlîM Ig S 16-bit transputer FEATURES • 16 bit architecture ■ 33 ns internal cycle time ■ 30 MIPS peak instruction rate ■ Debugging support ■ 4 Kbytes on-chip static RAM ■ 60 Mbytes/sec sustained data rate to internal memory	OCR Scan	PDF	16-bit 71E1E37 inmos transputer T225 inmos transputer T425 inmos T225 T400 clock transputer IMST222 2U06 T225 801C IMST225
IMST222 Abstract: IMST225 lwm 2464 a T805-G20E Text: SGS-THOMSON IMS T805E L K g lT IM M ! 32-bit floating-point transputer - Extended temperature EATURES 32 bit architecture 50 ns internal cycle tim e 20 M IPS peak instruction rate 2.8 M flops (peak) instruction rate Pin co m patible w ith IMS T800 Floating Point Unit	OCR Scan	PDF	T805E 32-bit IMST222 IMST225 lwm 2464 a T805-G20E
specifications of tdr Abstract: Inmos t805 IMS processor Text: SGS-THOMSON IMS T805 ’H E S m M M 32-bit floating-point transputer FEATURES • ■ ■ 32 bit architecture 40 ns internal cycle tim e 25 M IPS peak instruction rate ■ 3.6 M flops (peak) instruction rate ■ Pin co m patible w ith IMS T800, IMS T425, IMS T400	OCR Scan	PDF	32-bit specifications of tdr Inmos t805 IMS processor