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    181 CPL Search Results

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    181 CPL Price and Stock

    Broadcom Limited HCPL-181-06BE

    Transistor Output Optocouplers 3750 Vrms 0.2mA
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Mouser Electronics HCPL-181-06BE 89,340
    • 1 $0.69
    • 10 $0.426
    • 100 $0.26
    • 1000 $0.234
    • 10000 $0.175
    Buy Now

    Broadcom Limited HCPL-181-00DE

    Transistor Output Optocouplers 3750 Vrms 0.2mA
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Mouser Electronics HCPL-181-00DE 80,635
    • 1 $0.67
    • 10 $0.409
    • 100 $0.24
    • 1000 $0.219
    • 10000 $0.161
    Buy Now

    Broadcom Limited HCPL-181-000E

    Transistor Output Optocouplers 3750 Vrms 0.2mA
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Mouser Electronics HCPL-181-000E 68,736
    • 1 $0.76
    • 10 $0.454
    • 100 $0.243
    • 1000 $0.224
    • 10000 $0.185
    Buy Now

    Broadcom Limited HCPL-181-00BE

    Transistor Output Optocouplers 3750 Vrms 0.2mA
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Mouser Electronics HCPL-181-00BE 60,404
    • 1 $0.76
    • 10 $0.454
    • 100 $0.243
    • 1000 $0.22
    • 10000 $0.185
    Buy Now

    Broadcom Limited HCPL-181-060E

    Transistor Output Optocouplers 3750 Vrms 0.2mA
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Mouser Electronics HCPL-181-060E 57,825
    • 1 $0.78
    • 10 $0.481
    • 100 $0.26
    • 1000 $0.237
    • 10000 $0.175
    Buy Now

    181 CPL Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: KSE180/181/182 KSE180/181/182 Low Power Audio Amplifier Low Current High Speed Switching Applications TO-126 1 NPN Epitaxial Silicon Transistor 1. Emitter 2.Collector 3.Base Absolute Maximum Ratings TC=25°C unless otherwise noted Symbol VCBO Collector-Base Voltage


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    PDF KSE180/181/182 O-126 KSE180 KSE181 KSE182 KSE182 KSE182STU

    MAL218

    Abstract: 181 CPL
    Text: 181 CPL www.vishay.com Vishay BCcomponents Conductive Polymer Aluminum Capacitors SMD Chip , Low Impedance FEATURES • Long useful life: up to 5000 h at 105 °C • Very low ESR and highest ripple current • SMD-version with base plate, lead (Pb)-free reflow solderable


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    PDF 2002/95/EC. 2002/95/EC 2011/65/EU. JS709A 02-Oct-12 MAL218 181 CPL

    181 CPL

    Abstract: No abstract text available
    Text: V I S H AY I N T E R T E C H N O L O G Y, I N C . Aluminum Capacitors 181 CPL Conductive Polymer Aluminum Capacitors SMD Chip , Low Impedance KEY BENEFITS • • • • • High temperature range: up to 105 °C Soldering heat resistant acc. to IPC/JEDEC J-STD-020 on request


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    PDF J-STD-020 VMN-PT0455-1505 20-Mar-15 181 CPL

    ADF4001

    Abstract: No abstract text available
    Text: PCA0198A PHASE LOCKED LOOP 14118 Stowe Drive, Suite B | Poway, CA 92064 TEL: 858 621-2700 | FAX: (858) 486-1927 Rev A1 PHASE NOISE (1 Hz BW, typical) -70 -80 -90 -100 -110 FEATURES • Frequency Range: 198 - 199 MHz • Step Size: 100 KHz • CPLL - Style Package


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    PDF PCA0198A ADF4001

    Untitled

    Abstract: No abstract text available
    Text: PCA0198A PHASE LOCKED LOOP 14118 Stowe Drive, Suite B | Poway, CA 92064 TEL: 858 621-2700 | FAX: (858) 486-1927 Rev A1 PHASE NOISE (1 Hz BW, typical) -70 -80 -90 -100 -110 FEATURES • Frequency Range: 198 - 199 MHz • Step Size: 100 KHz • CPLL - Style Package


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    PDF PCA0198A

    8kx1 RAM

    Abstract: No abstract text available
    Text: Delta39K ISR™ CPLD Family PRELIMINARY CPLDs at FPGA Densities™ Features • Multiple I/O standards supported — LVCMOS 3.3/3.0/2.5/1.8V , LVTTL, 3.3V PCI, SSTL2 (I-II), SSTL3 (I-II), HSTL (I-IV), and GTL+ • Compatible with NOBL™, ZBT™, and QDR™ SRAMs


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    PDF Delta39KTM 233-MHz MIL-STD-883" /JESD22A114-A 39K50 39K30 Delta39K 39K165/200 CY3LV002 CY3LV020. 8kx1 RAM

    adf4001

    Abstract: AN-200 AN-201 AN-202 PCA0198A
    Text: PCA0198A PHASE LOCKED LOOP 9939 Via Pasar • San Diego, CA 92126 TEL 858 621-2700 FAX (858) 621-2722 Rev A1 PHASE NOISE (1 Hz BW, typical) -70 -80 -90 -100 -110 FEATURES • Frequency Range: 198 - 199 MHz • Step Size: 100 KHz • cPLL - Style Package


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    PDF PCA0198A P10-12 adf4001 AN-200 AN-201 AN-202 PCA0198A

    Untitled

    Abstract: No abstract text available
    Text: PCA0198A 9939 Via Pasar • San Diego, CA 92126 TEL 858 621-2700 FAX (858) 621-2722 VOLTAGE CONTROLLED OSCILLATOR Rev A1 PHASE NOISE (1 Hz BW, typical) -70 FEATURES 198 - 199 • Frequency Range: • Tuning Voltage: Vdc • cPLL - Style Package APPLICATIONS


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    PDF PCA0198A P10-12

    ADF4001

    Abstract: AN-200 AN-201 AN-202 PCA0198A
    Text: PCA0198A PHASE LOCKED LOOP 9939 Via Pasar • San Diego, CA 92126 TEL 858 621-2700 FAX (858) 621-2722 Rev A1 PHASE NOISE (1 Hz BW, typical) -70 -80 -90 -100 -110 FEATURES • Frequency Range: 198 - 199 MHz • Step Size: 100 KHz • cPLL - Style Package


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    PDF PCA0198A ADF4001 AN-200 AN-201 AN-202 PCA0198A

    27mhz remote control CAR connections diagram

    Abstract: ic1 ne555 pins 27mhz rf ic mcu usb stmicroelectronics 27mhz rf amplifier mouse 3d54h ANTENNA 93146
    Text: ST7WIND21 8-BIT LOW-SPEED USB MCU WITH 3 EPs, ROM, TIMERS, DUAL 27MHz RF RECEIVER, DUAL PS/2 PRELIMINARY DATA • ■ ■ ■ ■ ■ Memories – 24K ROM program memory with read/write protection – 2.5K RAM Clock, Reset and Supply Management – Dual Clock Source Management:


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    PDF ST7WIND21 27MHz 16-bit 27mhz remote control CAR connections diagram ic1 ne555 pins 27mhz rf ic mcu usb stmicroelectronics 27mhz rf amplifier mouse 3d54h ANTENNA 93146

    NT208

    Abstract: 1kx8 rom 250NTC
    Text: Delta39K ISR™ CPLD Family PRELIMINARY CPLDs at FPGA Densities™ •Carry-chain logic for fast and efficient arithmetic operations •Multiple I/O standards supported — LVCMOS 3.3/3.0/2.5/1.8V , LVTTL, 3.3V PCI, SSTL2 (I-II), SSTL3 (I-II), HSTL (I-IV), and GTL+


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    PDF Delta39KTM 250-MHz NT208 1kx8 rom 250NTC

    mod 8 ring counter using JK flip flop

    Abstract: ALU 74-181 auxillary contacts circuit datasheet ALU 74-181 mod 4 ring counter using JK flip flop UPSD3212C-40U6 UPSD3212CV UPSD3212CV-24T6 UPSD3212CV-24U6 LQFP80
    Text: UPSD3212A UPSD3212C, UPSD3212CV Flash programmable system devices with 8032 MCU and USB and programmable logic Features • Fast 8-bit 8032 MCU – 40 MHz at 5.0 V, 24 MHz at 3.3 V – Core, 12-clocks per instruction ■ Dual Flash memories with memory management


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    PDF UPSD3212A UPSD3212C, UPSD3212CV 12-clocks 15-year LQFP52 52-lead, LQFP80 80-lead, 16-bit mod 8 ring counter using JK flip flop ALU 74-181 auxillary contacts circuit datasheet ALU 74-181 mod 4 ring counter using JK flip flop UPSD3212C-40U6 UPSD3212CV UPSD3212CV-24T6 UPSD3212CV-24U6 LQFP80

    ST10R201

    Abstract: ST10F272 TQFP144 DIMENSION M29F400 PQFP144 ST10 ST10F269 ST10F272B ST10F272E TQFP144
    Text: ST10F272B ST10F272E 16-bit MCU with 256 Kbyte Flash memory and 12/20 Kbyte RAM Features • ■ ■ 16-bit CPU with DSP functions – 31.25ns instruction cycle time at 64MHz max CPU clock – Multiply/accumulate unit MAC 16 x 16-bit multiplication, 40-bit accumulator


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    PDF ST10F272B ST10F272E 16-bit 64MHz 16-bit 40-bit 32-bit ST10R201 ST10F272 TQFP144 DIMENSION M29F400 PQFP144 ST10 ST10F269 ST10F272B ST10F272E TQFP144

    39k200

    Abstract: CY39200V
    Text: Delta39K ISR™ CPLD Family PRELIMINARY CPLDs at FPGA Densities™ Features •Multiple I/O standards supported — LVCMOS 3.3/3.0/2.5/1.8V , LVTTL, 3.3V PCI, SSTL2 (I-II), SSTL3 (I-II), HSTL (I-IV), and GTL+ •Compatible with NOBL™, ZBT™, and QDR™ SRAMs


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    PDF Delta39KTM 250-MHz 39k200 CY39200V

    ST72321M9

    Abstract: TQFP64 footprint
    Text: ST72321M/R/AR 8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, FIVE TIMERS, SPI, SCI, I2C INTERFACE PRODUCT PREVIEW • ■ ■ ■ ■ Memories – 32K to 60K dual voltage High Density Flash HDFlash or ROM with read-out protection capability. In-Application Programming and


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    PDF ST72321M/R/AR 10-BIT ST72321M9 TQFP64 footprint

    Untitled

    Abstract: No abstract text available
    Text: UPSD3212A UPSD3212C, UPSD3212CV Flash programmable system devices with 8032 MCU and USB and programmable logic Features • Fast 8-bit 8032 MCU – 40 MHz at 5.0 V, 24 MHz at 3.3 V – Core, 12-clocks per instruction ■ Dual Flash memories with memory management


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    PDF UPSD3212A UPSD3212C, UPSD3212CV 12-clocks 15-year LQFP52 52-lead,

    heraeus pt 1000

    Abstract: ST72 ST72321 ST72321M TQFP64 TQFP80
    Text: ST72321M/R/AR 8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, FIVE TIMERS, SPI, SCI, I2C INTERFACE PRODUCT PREVIEW • ■ ■ ■ ■ Memories – 32K to 60K dual voltage High Density Flash HDFlash or ROM with read-out protection capability. In-Application Programming and


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    PDF ST72321M/R/AR 10-BIT heraeus pt 1000 ST72 ST72321 ST72321M TQFP64 TQFP80

    CY39200V

    Abstract: No abstract text available
    Text: Delta39K ISR™ CPLD Family PRELIMINARY CPLDs at FPGA Densities™ •Multiple I/O standards supported — LVCMOS, LVTTL, 3.3V PCI, SSTL2 I-II , SSTL3 (I-II), HSTL (I-IV), and GTL+ •Compatible with NOBL™, ZBT™, and QDR™ SRAMs •Programmable slew rate control on each I/O pin


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    PDF Delta39KTM NT208 51-85069-B 388-Lead MG388 256-Ball BB256/MB256 1-85108-A CY39200V

    k1358

    Abstract: COOLRUNNER-II ucf file tq144 COOLRUNNER-II ucf file XAPP399 F14152 XAPP393 XC2C64 manual XAPP 138 data CP132 -20/COOLRUNNER-II ucf file tq144
    Text: Application Note: CoolRunner-II CPLDs R Assigning CoolRunner-II VREF Pins XAPP399 v1.1 July 25, 2003 Summary The flexibility of the CoolRunner -II CPLD allows users to configure any I/O pin to act as a voltage reference (VREF) pin. This document describes the different methods and underlying


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    PDF XAPP399 128-macrocell as093 XC2C128 com/bvdocs/publications/ds094 XC2C256 com/bvdocs/publications/ds095 XC2C384 com/bvdocs/publications/ds096 XC2C512 k1358 COOLRUNNER-II ucf file tq144 COOLRUNNER-II ucf file XAPP399 F14152 XAPP393 XC2C64 manual XAPP 138 data CP132 -20/COOLRUNNER-II ucf file tq144

    Untitled

    Abstract: No abstract text available
    Text: Cyclone V Device Overview 2013.05.06 CV-51001 Subscribe Feedback The Cyclone V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and


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    PDF CV-51001

    CY39100V484-125BBI

    Abstract: "Single-Port RAM" delta39k
    Text: Delta39K ISR™ CPLD Family PRELIMINARY CPLDs at FPGA Densities™ •Multiple I/O standards supported — LVCMOS, LVTTL, 3.3V PCI, SSTL2 I-II , SSTL3 (I-II), HSTL (I-IV), and GTL+ •Compatible with NOBL™, ZBT™, and QDR™ SRAMs •Programmable slew rate control on each I/O pin


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    PDF Delta39KTM CY39100V484-125BBI "Single-Port RAM" delta39k

    Untitled

    Abstract: No abstract text available
    Text: Cyclone V Device Overview 2013.12.26 CV-51001 Subscribe Send Feedback The Cyclone V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and


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    PDF CV-51001

    tlcs-870 series instruction set

    Abstract: 9c001 tlcs-870x series instruction set TLCS-870 tlcs870 mnemonic
    Text: TO SH IB A TLCS-870/X TLCS-870/X Series Instruction Set TLCS-870/X CPU has 842 basic machine instructions of 181 types shown in Table 1. All of instructions are used in any derivative of the TLCS-870/X Series. The TLCS-870/X Series instruction set is upward version oftheTLCS870 Series.


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    PDF TLCS-870/X oftheTLCS-870 tlcs-870 series instruction set 9c001 tlcs-870x series instruction set TLCS-870 tlcs870 mnemonic

    TC518128

    Abstract: tc518128cfl80 TC518128CFL-80 cfl circuit diagrams TC518128CFL-70
    Text: INTEGRATED TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT CIRCUIT TC 5 1 8 1 2 8 C P L /C S P L /C F L / CFWL / CFTL - 7 0 , TC 5 1 8 1 2 8 CPL / CSPL / CFL / CFWL / CFTL - 8 0 TC 5 1 8 1 2 8 CPL / C S PL/ CFL / CFWL / CFTL - 1 0 , TC 5 1 8 1 2 8 CPL/ CSPL / CFL/ CFW L/ CFTL - 7 0 L


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    PDF 072-WORD 18128C 578-bit TC518128CFWL-70, TC518128CFWL-80, TC518128CFWL-10, TC518128CPL-- TC518128 tc518128cfl80 TC518128CFL-80 cfl circuit diagrams TC518128CFL-70