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Central Semiconductor Corp CPZ18-BZX55C5V1-CT DIODE ZENER
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DigiKey	CPZ18-BZX55C5V1-CT	Bulk				1 - 10 - 100 - 1000 - 10000 -	Buy Now
ams OSRAM Group LEUWQ9WP-5N8N-IM-0-A40-R18B-Z-XX LED OSTAR WHITE SMD
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DigiKey	LEUWQ9WP-5N8N-IM-0-A40-R18B-Z-XX	Reel				1 - 10 - 100 - 1000 - 10000 -	Buy Now
ams OSRAM Group LEUWQ9WP-N65P-IM-0-A40-R18B-Z-XX LED OSTAR WHITE SMD
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DigiKey	LEUWQ9WP-N65P-IM-0-A40-R18B-Z-XX	Reel				1 - 10 - 100 - 1000 - 10000 -	Buy Now
ams OSRAM Group LE-UW-Q9WP-5N8N-HM-0-A40-R18B-Z-XX LED OSTAR WHITE SMD
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DigiKey	LE-UW-Q9WP-5N8N-HM-0-A40-R18B-Z-XX	Reel				1 - 10 - 100 - 1000 - 10000 -	Buy Now
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Vishay Intertechnologies BZX84C18-HE3_A-08 Zener Diodes
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Mouser Electronics	BZX84C18-HE3_A-08		29,750			1 $0.37 10 $0.263 100 $0.128 1000 $0.074 10000 $0.049	Buy Now

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18 BZX Datasheets Context Search

Catalog Datasheet	MFG & Type	PDF	Document Tags
Untitled Abstract: No abstract text available Text: CY7C1318CV18, CY7C1320CV18 18-Mbit DDR II SRAM 2-Word Burst Architecture 18-Mbit DDR II SRAM 2-Word Burst Architecture Features Configurations • 18-Mbit density 1 M x 18, 512 K × 36 CY7C1318CV18 – 1M × 18 ■ 267-MHz clock for high bandwidth CY7C1320CV18 – 512K × 36	Original	PDF	CY7C1318CV18, CY7C1320CV18 18-Mbit CY7C1318CV18 267-MHz
Untitled Abstract: No abstract text available Text: CY7C1381D, CY7C1381F CY7C1383D, CY7C1383F 18-Mbit 512 K x 36/1 M × 18 Flow Through SRAM 18-Mbit (512 K × 36/1 M × 18) Flow Through SRAM Features Functional Description • Supports 133 MHz bus operations ■ 512 K × 36 and 1 M × 18 common I/O ■ 3.3 V core power supply (VDD)	Original	PDF	CY7C1381D, CY7C1381F CY7C1383D, CY7C1383F 18-Mbit CY7C1381D/CY7C1381F/CY7C1383D/CY7C1383F
3M Touch Systems Abstract: No abstract text available Text: CY7C11461KV18, CY7C11571KV18 CY7C11481KV18, CY7C11501KV18 18-Mbit DDR II+ SRAM 2-Word Burst Architecture 2.0 Cycle Read Latency 18-Mbit DDR II+ SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) Features Functional Description • 18-Mbit Density (2M x 8, 2M x 9, 1M x 18, 512K x 36)	Original	PDF	CY7C11461KV18, CY7C11571KV18 CY7C11481KV18, CY7C11501KV18 18-Mbit CY7C11571KV18, CY7C11501KV18 3M Touch Systems
3M Touch Systems Abstract: No abstract text available Text: CY7C11661KV18, CY7C11771KV18 CY7C11681KV18, CY7C11701KV18 18-Mbit DDR II+ SRAM Two-Word Burst Architecture 2.5 Cycle Read Latency 18-Mbit DDR II+ SRAM Two-Burst Architecture (2.5 Cycle Read Latency) Features Functional Description • 18-Mbit density (2 M x 8, 2 M × 9, 1 M × 18, 512 K × 36)	Original	PDF	CY7C11661KV18, CY7C11771KV18 CY7C11681KV18, CY7C11701KV18 18-Mbit CY7C11771KV18, CY7C11701KV18 3M Touch Systems
Untitled Abstract: No abstract text available Text: CY7C1313CV18 CY7C1315CV18 18-Mbit QDR II SRAM 4-Word Burst Architecture 18-Mbit QDR® II SRAM 4-Word Burst Architecture Features Configurations Separate independent read and write data ports ❐ Supports concurrent transactions CY7C1313CV18 – 1M x 18 •	Original	PDF	CY7C1313CV18 CY7C1315CV18 18-Mbit CY7C1313CV18
Untitled Abstract: No abstract text available Text: CY7C1312CV18 CY7C1314CV18 18-Mbit QDR II SRAM 2-Word Burst Architecture 18-Mbit QDR® II SRAM 2-Word Burst Architecture Features Configurations • Separate independent Read and Write Data Ports ❐ Supports concurrent transactions CY7C1312CV18 – 1M x 18	Original	PDF	CY7C1312CV18 CY7C1314CV18 18-Mbit CY7C1312CV18
Untitled Abstract: No abstract text available Text: THIS SPEC IS OBSOLETE Spec No: 001-07160 Spec Title: CY7C1318CV18/CY7C1320CV18, 18-MBIT DDR II SRAM 2-WORD BURST ARCHITECTURE Sunset Owner: Jayasree Nayar NJY Replaced by: NONE CY7C1318CV18, CY7C1320CV18 18-Mbit DDR II SRAM 2-Word Burst Architecture 18-Mbit DDR II SRAM 2-Word Burst Architecture	Original	PDF	CY7C1318CV18/CY7C1320CV18, 18-MBIT CY7C1318CV18, CY7C1320CV18 CY7C1318CV18 267-MHz
Untitled Abstract: No abstract text available Text: CY7C13101KV18, CY7C13251KV18 CY7C13121KV18, CY7C13141KV18 18-Mbit QDR II SRAM 2-Word Burst Architecture 18-Mbit QDR® II SRAM 2-Word Burst Architecture Features Configurations Separate independent read and write data ports ❐ Supports concurrent transactions	Original	PDF	18-Mbit CY7C13101KV18, CY7C13251KV18 CY7C13121KV18, CY7C13141KV18 CY7C13101KV18 CY7C13251KV18 CY7C13121KV18
Untitled Abstract: No abstract text available Text: CY7C1311BV18, CY7C1911BV18 CY7C1313BV18, CY7C1315BV18 18-Mbit QDR -II SRAM 4-Word Burst Architecture 18-Mbit QDR™-II SRAM 4-Word Burst Architecture Features Functional Description • Separate independent read and write data ports ❐ Supports concurrent transactions	Original	PDF	CY7C1311BV18, CY7C1911BV18 CY7C1313BV18, CY7C1315BV18 18-Mbit CY7C1911BV18, CY7C1315BV18
Untitled Abstract: No abstract text available Text: CY7C1361C CY7C1363C PRELIMINARY 9-Mbit 256K x 36/512K x 18 Flow-Through SRAM Functional Description[1] Features • Supports 133-MHz bus operations The CY7C1361C/CY7C1363C is a 3.3V, 256K x 36 and 512K x 18 Synchronous Flowthrough SRAMs, respectively designed	Original	PDF	CY7C1361C CY7C1363C 36/512K 133-MHz CY7C1361C/CY7C1363C
3M Touch Systems Abstract: No abstract text available Text: CY7C11611KV18, CY7C11761KV18 CY7C11631KV18, CY7C11651KV18 18-Mbit QDR II+ SRAM 4-Word Burst Architecture 2.5 Cycle Read Latency 18-Mbit QDR® II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) Features Functional Description • Separate independent read and write data ports	Original	PDF	18-Mbit CY7C11611KV18, CY7C11761KV18 CY7C11631KV18, CY7C11651KV18 CY7C11761KV18, CY7C11651KV18 3M Touch Systems
KDZ10EV Abstract: KDZ10V KDZ11EV KDZ12EV KDZ13EV KDZ15EV KDZ16EV KDZ18EV KDZ20EV KDZ22EV Text: Surface Mount Zener Diodes 100mW 150mW 2A 2B 2C 2D 30 33 36 39 43 47 51 56 62 68 75 82 91 10 11 12 13 15 16 18 20 22 24 200mW 2A 2B 2C 2D 30 33 36 39 43 47 51 56 62 68 75 82 91 10 11 12 13 15 16 18 20 22 24 Marking Code Part No. BZX384-C2V4 BZX384-C2V7 BZX384-C3V0	Original	PDF	100mW 150mW 200mW KDZ10EV KDZ10V KDZ11EV KDZ12EV KDZ13EV KDZ15EV KDZ16EV KDZ18EV KDZ20EV KDZ22EV
CY7C1312BV18-167BZC Abstract: No abstract text available Text: CY7C1312BV18 CY7C1314BV18 18-Mbit QDR II SRAM Two-Word Burst Architecture 18-Mbit QDR® II SRAM Two-Word Burst Architecture Features Functional Description • Separate independent read and write data ports ❐ Supports concurrent transactions ■ 250 MHz clock for high bandwidth	Original	PDF	CY7C1312BV18 CY7C1314BV18 18-Mbit CY7C1312BV18, CY7C1314BV18 CY7C1312BV18-167BZC
Untitled Abstract: No abstract text available Text: CY7C1312BV18 CY7C1314BV18 18-Mbit QDR II SRAM Two-Word Burst Architecture 18-Mbit QDR® II SRAM Two-Word Burst Architecture Features Functional Description • Separate independent read and write data ports ❐ Supports concurrent transactions ■ 250 MHz clock for high bandwidth	Original	PDF	CY7C1312BV18 CY7C1314BV18 18-Mbit CY7C1312BV18, CY7C1314BV18

CY7C1386D Abstract: CY7C1387D Text: PRELIMINARY CY7C1386D CY7C1387D 18-Mbit 512K x 36/1 Mbit x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200 and 167 MHz • Registered inputs and outputs for pipelined operation	Original	PDF	CY7C1386D CY7C1387D 18-Mbit 250-MHz 200-MHz 167-MHz CY7C1386D CY7C1387D
Untitled Abstract: No abstract text available Text: UM10692 SSL2109ADB1105 - 120 V/18 W PAR38 high PF isolated LED driver demo board Rev. 1 — 9 April 2013 User manual Document information Info Content Keywords SSL2109ADB1105, flyback converter, high PF, PAR38 Abstract This document describes the operation of a 120 V/18 W non-dimmable	Original	PDF	UM10692 SSL2109ADB1105 PAR38 SSL2109ADB1105, PAR38 SSL2109A PAR30
CY7C1386D Abstract: CY7C1387D Text: PRELIMINARY CY7C1386D CY7C1387D 18-Mbit 512K x 36/1 Mbit x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200 and 167 MHz • Registered inputs and outputs for pipelined operation	Original	PDF	CY7C1386D CY7C1387D 18-Mbit 250-MHz 200-MHz 167-MHz CY7C1386D/CY7C1387D CY7C1386D CY7C1387D
CY7C1470BV25 Abstract: No abstract text available Text: CY7C1470BV25 CY7C1472BV25 72-Mbit 2 M x 36/4 M × 18 Pipelined SRAM with NoBL Architecture 72-Mbit (2 M × 36/4 M × 18) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™	Original	PDF	CY7C1470BV25 CY7C1472BV25 72-Mbit 250-MHz CY7C1470BV25
CY7C1470BV25 Abstract: No abstract text available Text: CY7C1470BV25 CY7C1472BV25 72-Mbit 2 M x 36/4 M × 18 Pipelined SRAM with NoBL Architecture 72-Mbit (2 M × 36/4 M × 18) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™	Original	PDF	CY7C1470BV25 CY7C1472BV25 72-Mbit CY7C1472BV25
con2 Abstract: 2kbpo8m LM335Z BZX85C5V1 CON13 j6 con4 1N4148 b.a part 1 BZX85C16 STGB6NC60HD Text: Motor Control RDK Revised: Tuesday, October 18, 2005 PowerBD-300 Revision: A1 SYSTEMS LAB M.Di Guardo G.Rasconà Bill Of Materials November 4,2005 15:19:51 Item Quantity Reference _ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19	Original	PDF	PowerBD-300 100uF 100nF 1N4148 STTH106 STTH108) BZX84C15 BZX85C5V1 BZX85C16 VIPER12ADIP con2 2kbpo8m LM335Z BZX85C5V1 CON13 j6 con4 1N4148 b.a part 1 BZX85C16 STGB6NC60HD
Untitled Abstract: No abstract text available Text: CY7C1370D, CY7C1372D 18-Mbit 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin-compatible and Functionally equivalent to ZBT™ ■ Supports 250-MHz Bus Operations with Zero Wait States ❐ Available speed grades are 250, 200, and 167 MHz	Original	PDF	CY7C1370D, CY7C1372D 18-Mbit 36/1M CY7C1370D CY7C1372D
CY7C1370D Abstract: CY7C1372D G-383 Text: CY7C1370D CY7C1372D PRELIMINARY 18-Mbit 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™ • Supports 250-MHz bus operations with zero wait states — Available speed grades are 250, 225, 200, and	Original	PDF	CY7C1370D CY7C1372D 18-Mbit 36/1M 250-MHz CY7C1370D CY7C1372D CY7C1370D/CY7C1372D G-383
CY7C1470V25 Abstract: CY7C1472V25 CY7C1474V25 29T1 Text: CY7C1470V25 CY7C1472V25 CY7C1474V25 72-Mbit 2 M x 36/4 M × 18/1 M × 72 Pipelined SRAM with NoBL Architecture 72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined SRAM with NoBLTM Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™	Original	PDF	CY7C1470V25 CY7C1472V25 CY7C1474V25 72-Mbit 250-MHz CY7C1470V25 CY7C1472V25 CY7C1474V25 29T1
BwC 110 Transistor Abstract: CY7C1470BV25 CY7C1474BV25 Text: CY7C1470BV25 CY7C1472BV25, CY7C1474BV25 72-Mbit 2 M x 36/4 M × 18/1 M × 72 Pipelined SRAM with NoBL Architecture 72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™	Original	PDF	CY7C1470BV25 CY7C1472BV25, CY7C1474BV25 72-Mbit CY7C1470BV25, CY7C1474BV25 BwC 110 Transistor

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18 BZX Search Results

18 BZX Price and Stock

Central Semiconductor Corp CPZ18-BZX55C5V1-CT

ams OSRAM Group LEUWQ9WP-5N8N-IM-0-A40-R18B-Z-XX

ams OSRAM Group LEUWQ9WP-N65P-IM-0-A40-R18B-Z-XX

ams OSRAM Group LE-UW-Q9WP-5N8N-HM-0-A40-R18B-Z-XX

Vishay Intertechnologies BZX84C18-HE3_A-08

18 BZX Datasheets Context Search

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3M Touch Systems

3M Touch Systems

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3M Touch Systems

KDZ10EV

CY7C1312BV18-167BZC

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CY7C1386D

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CY7C1386D

CY7C1470BV25

CY7C1470BV25

con2

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CY7C1370D

CY7C1470V25

BwC 110 Transistor