14MAR2008 Search Results

INA2128

Abstract: INA2128U INA2128UA SOIC-16
Contextual Info: INA2128 INA 212 8 INA 212 8 SBOS035A – DECEMBER 1995 – REVISED APRIL 2007 Dual, Low Power INSTRUMENTATION AMPLIFIER DESCRIPTION FEATURES ● ● ● ● ● ● ● ● LOW OFFSET VOLTAGE: 50µV max LOW DRIFT: 0.5µV/°C max LOW INPUT BIAS CURRENT: 5nA max

STM32F103xE

Abstract: LQPF100 FOOTPRINTS BGA64 LQFP100 LQFP48 LQFP64 STM32F103C8 STM32F103RB AN2606 STM32F103CBT6
Contextual Info: STM32F103x8 STM32F103xB Medium-density performance line ARM-based 32-bit MCU with 64 or 128 KB Flash, USB, CAN, 7 timers, 2 ADCs, 9 communication interfaces Features • Core: ARM 32-bit Cortex -M3 CPU – 72 MHz maximum frequency, 1.25 DMIPS/MHz Dhrystone 2.1

STM32 LQFP-64 footprint

Abstract: rain alarm CIRCUIT using IC 555 vfQFPn-36 footprint LQFP100 LQFP48 LQFP64 STM32F101 QFN-36 STM32F10xxx jtag
Contextual Info: STM32F101x8 STM32F101xB Medium-density access line, ARM-based 32-bit MCU with 64 or 128 KB Flash, 6 timers, ADC and 7 communication interfaces Features • Core: ARM 32-bit Cortex -M3 CPU – 36 MHz maximum frequency, 1.25 DMIPS/MHz Dhrystone 2.1 performance at 0 wait state memory

STM32F103Cx

Abstract: STM32F103Rx vfQFPn-36 footprint stm32f10x manual timer pwm STM32F10x STM32F103xB STM32F103Tx
Contextual Info: STM32F103x6 STM32F103x8 STM32F103xB Performance line, ARM-based 32-bit MCU with up to 128 KB Flash, USB, CAN, seven 16-bit timers, 2 ADCs & 9 communication interfaces Features • ■ ■ Core: ARM 32-bit Cortex -M3 CPU – 72 MHz maximum frequency, 1.25 DMIPS/MHz Dhrystone 2.1

LQFP100

Abstract: LQFP48 LQFP64
Contextual Info: STM32F101x8 STM32F101xB Medium-density access line, ARM-based 32-bit MCU with 64 or 128 KB Flash, 6 timers, ADC and 7 communication interfaces Features • Core: ARM 32-bit Cortex -M3 CPU – 36 MHz maximum frequency, 1.25 DMIPS/MHz Dhrystone 2.1 performance at 0 wait state memory

Contextual Info: STM32F101x8 STM32F101xB Medium-density access line, ARM-based 32-bit MCU with 64 or 128 KB Flash, 6 timers, ADC and 7 communication interfaces Features • Core: ARM 32-bit Cortex -M3 CPU – 36 MHz maximum frequency, 1.25 DMIPS/MHz Dhrystone 2.1 performance at 0 wait state memory

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6TPD330M

Abstract: C3225X5R1C106M SLMA002 TPS54010 TPS54010PWP TPS54010PWPR
Contextual Info: Typical Size 6,4 mm X 9,7 mm TPS54010 www.ti.com SLVS509B – MAY 2004 – REVISED JUNE 2005 2.2 – 4 -V, 14-A OUTPUT SYNCHRONOUS BUCK PWM SWITCHER WITH INTEGRATED FETs SWIFT FEATURES • • • • • • • • • DESCRIPTION Separate Low-Voltage Power Bus

Contextual Info: SN74LV4053AĆQ1 TRIPLE 2ĆCHANNEL ANALOG MULTIPLEXER/DEMULTIPLEXER SCLS521A − AUGUST 2003 − REVISED MAY 2004 D Qualification in Accordance With D OR PW PACKAGE TOP VIEW AEC-Q100† D Qualified for Automotive Applications D Customer-Specific Configuration Control

Contextual Info: SN74HCT04ĆQ1 HEX INVERTER SCLS535 − AUGUST 2003 D Qualification in Accordance With D D D D D D D AEC-Q100† Qualified for Automotive Applications Customer-Specific Configuration Control Can Be Supported Along With Major-Change Approval ESD Protection Exceeds 2000 V Per

Contextual Info: SN65LBC170, SN75LBC170 TRIPLE DIFFERENTIAL TRANSCEIVERS SLLS459C − NOVEMBER 2000 − REVISED MARCH 2005 D Three Differential Transceivers in One D D D D D D D D D D D Package Signaling Rates† Up to 30 Mbps Low Power and High Speed Designed for TIA/EIA-485, TIA/EIA-422, ISO

IXYS DSE160-06A

Abstract: DSE160-06A dse160-06
Contextual Info: DRV103 D RV DRV 103 103 SBVS029A – JUNE 2001 PWM LOW-SIDE DRIVER 1.5A and 3A for Solenoids, Coils, Valves, Heaters, and Lamps FEATURES DESCRIPTION ● HIGH OUTPUT DRIVE: 1.5A and 3A Versions ● WIDE SUPPLY RANGE: +8V to +32V ● COMPLETE FUNCTION Digitally Controlled Input

PG715

Abstract: A115-A C101 P82B715 P82B715D P82B715P
Contextual Info: P82B715 I2C BUS EXTENDER www.ti.com SCPS145A – DECEMBER 2007 – REVISED FEBRUARY 2008 FEATURES 1 • • • • • Operating Power-Supply Voltage Range of 3 V to 12 V Supports Bidirectional Data Transfer of I2C Bus Signals Allows Bus Capacitance of 400 pF on Main I2C

Contextual Info: STM32F101x8 STM32F101xB Medium-density access line, ARM-based 32-bit MCU with 64 or 128 KB Flash, 6 timers, ADC and 7 communication interfaces Datasheet - production data Features • Core: ARM 32-bit Cortex -M3 CPU – 36 MHz maximum frequency, 1.25 DMIPS/MHz Dhrystone 2.1

Contextual Info: P82B715 I2C BUS EXTENDER w w w .t i.c om SCPS145A – DECEMBER 2007 – REVISED FEBRUARY 2008 FEATURES 1 • • • • • Operating Power-Supply Voltage Range of 3 V to 12 V Supports Bidirectional Data Transfer of I2C Bus Signals Allows Bus Capacitance of 400 pF on Main I2C

PC13-TAMPERRTC

Contextual Info: STM32F101x6 STM32F101x8 STM32F101xB Medium-density access line, ARM-based 32-bit MCU with 32 to 128 KB Flash, six timers, ADC and 7 communication interfaces Features • Core: ARM 32-bit Cortex -M3 CPU – 36 MHz maximum frequency, 1.25 DMIPS/MHz Dhrystone 2.1

STMPE1601

Contextual Info: STMPE1601 16-bit enhanced port expander with keypad and PWM controller Xpander Logic Preliminary Data Features • 16 GPIOs 8 operate at core supply VCC , 8 operate at IO supply Vio ■ Operating voltage 1.8 − 3.3 V ■ Hardware keypad controller (8*8 matrix with 4

stm32f101xx PWM

Contextual Info: STM32F101x6 STM32F101x8 STM32F101xB Access line, advanced ARM-based 32-bit MCU with Flash memory, six 16-bit timers, ADC and seven communication interfaces Features • Core: ARM 32-bit Cortex -M3 CPU – 36 MHz maximum frequency, 1.25 DMIPS/MHz Dhrystone 2.1

6TPD330M

Abstract: C3225X5R1C106M SLMA002 TPS54010 TPS54010PWP TPS54010PWPR
Contextual Info: Typical Size 6,4 mm X 9,7 mm TPS54010 www.ti.com SLVS509B – MAY 2004 – REVISED JUNE 2005 2.2 – 4 -V, 14-A OUTPUT SYNCHRONOUS BUCK PWM SWITCHER WITH INTEGRATED FETs SWIFT FEATURES • • • • • • • • • DESCRIPTION Separate Low-Voltage Power Bus

stm32f103xx

Abstract: STM32F103Tx STM32 LQFP-64 footprint FT2384 LQFP100 LQFP48 LQFP64 STM32F103C6 STM32F103C8 STM32F103Rx
Contextual Info: STM32F103x6 STM32F103x8 STM32F103xB Performance line, ARM-based 32-bit MCU with Flash, USB, CAN, seven 16-bit timers, two ADCs and nine communication interfaces Features • ■ ■ Core: ARM 32-bit Cortex -M3 CPU – 72 MHz maximum frequency, 1.25 DMIPS/MHz Dhrystone 2.1

bq24730

Abstract: bq24730RGFR bq24730RGFT FDS6680A SI4435 BAT54 BAT54C p-channel mosfet driver
Contextual Info: bq24730 www.ti.com SLUS695 – MARCH 2006 ADVANCED MULTI-CHEMISTRY AND MULTI-CELL SYNCHRONOUS SWITCH-MODE CHARGER AND SYSTEM POWER SELECTOR FEATURES APPLICATIONS • • • • REGN LODRV PGND STAT 36 35 34 33 HIDRV PH 38 37 PVCC BTST 32 CELLS 2 31 BATDRV

HXM122032-GB1

Abstract: HXM122032-GB1TM HXM122032 pjs008-2000 STM8A STM8 spi display AN2673 notes on USART communication 78EEUD lcd display
Contextual Info: AN2673 Application note STM8A SPI application examples Introduction This application note is one of a set of application notes giving examples of how to use the various blocks of the STM8A microcontroller family and the STM8 firmware library. It is intended to provide three practical application examples of the use of the SPI peripheral in

STM32F103Cx

Abstract: C4496 STM32F103CBT6 STM32F103XX TFBGA-64 TFBGA64 STM32F103xE STM32F103C8 stm32f10x manual BGA64
Contextual Info: STM32F103x8 STM32F103xB Medium-density performance line ARM-based 32-bit MCU with 64 or 128 KB Flash, USB, CAN, 7 timers, 2 ADCs, 9 communication interfaces Features • Core: ARM 32-bit Cortex -M3 CPU – 72 MHz maximum frequency, 1.25 DMIPS/MHz Dhrystone 2.1

TL431ACDR

Abstract: TL431ACDBVR TL431 TL431A TL431B TL431CD TL431CP TL432 TL432A TL432B
Contextual Info: TL431, TL431A, TL431B TL432, TL432A, TL432B ADJUSTABLE PRECISION SHUNT REGULATORS SLVS543J − AUGUST 2004 − REVISED DECEMBER 2005 D Operation From −40°C to 125°C D Reference Voltage Tolerance at 25°C D − 0.5% . . . B Grade − 1% . . . A Grade − 2% . . . Standard Grade