12NOV2004 Search Results

Contextual Info: THIS DRAWING IS UNPUBLISHED. COPYRIGHT RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. - LOC ALL RIGHTS RESERVED. DIST 16 AJ REVISIONS LTR DESCRIPTION D DWN DATE EC PER 0 S 1 4 - 0 1 9 2 - 0 4 12NOV2004 APVD JGH JL D 1\ PHOSPHOR ZINC PER BRONZE PER Q Q - B - 7 5 0 .

Contextual Info: 4 THIS DRAWING IS UNPUBLISHED. COPYRIGHT 1 3 RELEASED FOR PUBLICATION LOC ALL RIGHTS RESERVED. BY TYCO ELECTRONICS CORPORATION. DIST AJ REVISIONS 16 LTR K DATE DWN APVD 12NOV2004 JGH JL DESCRIPTION EC PER 0 5 1 4 - 0 1 9 2 - 0 4 D D 1 . USE INSTRUCTION SHEET 1799-5

twin bnc tyco

Contextual Info: THIS DRAWING IS UNPUBLISHED. COPYRIGHT - RELEASED FOR PUBLICATION LOC ALL RIGHTS RESERVED. DIST 16 AJ BY TYCO ELECTRONIC5 CORPORATION. REVISIONS LTR DESCRIPTION DATE 12NOV2004 EC PER 0 5 1 4 - 0 1 9 2 - 0 4 1\ P O L Y E S T E R , PBT, 1 5 % PER MIL—M —2 4 5 1 9.

Contextual Info: 8 THIS DRAWING IS UNPUBLISHED. COPYRIGHT - 7 RELEASED FOR PUBLICATION BY TYCO ELECTRONIC5 CORPORATION. LOC ALL RIGHTS RESERVED. AJ DIST REVISIONS 16 LTR DESCRIPTION DATE 12NOV2004 EC PER 0514-0192-04 1\ USE WITH A MP USED W ITH O U T CABLE USED WITH I.S. APVD

Contextual Info: “ I THIS DRAWING IS UNPUBLISHED. COPYRIGHT - RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. LOC ALL RIGHTS RESERVED. AJ DIST 16 R E V IS IO N S LTR DESCRIPTION DATE EC PER 0 S 1 4 - 0 1 9 2 - 0 4 DWN 12NOV2004 APVD JGH JL D D 2 6 . 9 2 MAX

Contextual Info: 4 THIS DRAWING IS UNPUBLISHED. COPYRIGHT 3 RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. — i — LOC A LL RIGHTS RESERVED. AJ DIST 16 REVISIONS LTR B DESCRIPTION EC PER OWN DATE OSI 4 - 0 1 9 2 - 0 4 12NOV2004 APVD JGH JL D D 0 1 2 . 8 3 MAX

Contextual Info: 8 7 THIS DRAWING IS UNPUBLISHED. ^ COPYRIGHT - 6 RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. ALL RIGHTS RESERVED. D IE L E C T R IC ^ GASKET^ SPRING^ i A AMP 4805 REV 31MAR2000 5 LOC AJ DIST 16 REVISIONS LTR DESCRIPTION OWN DATE 12NOV2004 EC PER O S 1 4 - 0 1 9 2 - 0 4

Contextual Info: 4 THIS DRAWING IS UNPUBLISHED. COPYRIGHT 3 —»— RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. LOC ALL RIGHTS RESERVED. AJ REVISIONS DIST 16 LTR DESCRIPTION OWN DATE EC PER OS1 4 - 0 1 9 2 - 0 4 12NOV2004 APVD JGH JL D D 3 3 . 3 2 MAX [1 .3 1 2 ]

225592

Contextual Info: 4 THIS DRAWING IS UNPUBLISHED. COPYRIGHT 3 RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. LOC ALL RIGHTS RESERVED. DIST REVISIONS 16 AJ LTR DESCRIPTION DATE EC PER 0514- 0192-04 DWN 12NOV2004 APVD JGH JL D D 1. SEE IS 2299- 3 fA V 15.06 REF [.593]

Contextual Info: 8 THIS DRAWING IS UNPUBLISHED. COPYRIGHT - 7 RELEASED FOR PUBLICATION BY TYCO ELECTRONIC5 CORPORATION. LOC ALL RIGHTS RESERVED. REVISIONS D IS T 16 AJ LTR DESCRIPTION DATE 12NOV2004 EC PER 0514-0192-04 OWN APVD JGH JL D D 1\ 2. SEE SEPARATE RESTRIC TED DRAWING

Contextual Info: 74VHC139 DUAL 2 TO 4 DECODER/DEMULTIPLEXER • ■ ■ HIGH SPEED: tPD = 5.0 ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE:

74VHC174

Contextual Info: 74VHC174 HEX D-TYPE FLIP FLOP WITH CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 175MHz TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS

74VHC257

Abstract: 74VHC257MTR 74VHC257TTR TSSOP16 VHC257
Contextual Info: 74VHC257 QUAD 2 CHANNEL MULTIPLEXER 3-STATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.7ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS

74VHC174

Abstract: 74VHC174MTR 74VHC174TTR TSSOP16
Contextual Info: 74VHC174 HEX D-TYPE FLIP FLOP WITH CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 175MHz TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS

74VHC273

Abstract: 74VHC273MTR 74VHC273TTR
Contextual Info: 74VHC273 OCTAL D-TYPE FLIP FLOP WITH CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 165 MHz TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS

74VHC139

Abstract: 74VHC139MTR 74VHC139TTR TSSOP16
Contextual Info: 74VHC139 DUAL 2 TO 4 DECODER/DEMULTIPLEXER • ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.0 ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS

Contextual Info: 74VHC157 QUAD 2 CHANNEL MULTIPLEXER • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 4.1 ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS

W5NK90Z

Contextual Info: STP6NK70Z STF6NK70Z - STW6NK70Z N-channel 700V - 1.5Ω - 5A - TO-220/TO-220FP Zener-protected SuperMESH Power MOSFET General features VDSS @Tjmax RDS(on) STP6NK70Z 700 V < 1.8 Ω 5A STF6NK70Z 700 V <1.8 Ω 5 A(1) STW6NK70Z 700 V < 1.8 Ω 5A Type ID

w5nk90z

Abstract: B2 marking code Zener STW6NK70Z JESD97 STF6NK70Z STP6NK70Z p6nk
Contextual Info: STP6NK70Z STF6NK70Z - STW6NK70Z N-channel 700V - 1.5Ω - 5A - TO-220/TO-220FP Zener-protected SuperMESH Power MOSFET General features VDSS @Tjmax RDS(on) STP6NK70Z 700 V < 1.8 Ω 5A STF6NK70Z 700 V <1.8 Ω 5 A(1) STW6NK70Z 700 V < 1.8 Ω 5A Type ID

74VHC374

Contextual Info: 74VHC374 OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUTS NON INVERTING • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 270 MHz TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.)

74VHC126

Abstract: 74VHC126MTR 74VHC126TTR TSSOP14
Contextual Info: 74VHC126 QUAD BUS BUFFERS 3-STATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.8ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE:

AN1822

Abstract: NAND512W3A 64MB "nand flash memory" fat32 Wear Leveling in Single Level Cell NAND Flash Memory error free nand NAND FLASH 64MB Wear Leveling in Single Level Cell NAND Flash memories leveling FAT32 FLASH TRANSLATION LAYER FTL
Contextual Info: AN1822 APPLICATION NOTE Wear Leveling in Single Level Cell NAND Flash Memories This Application Note describes the Wear Leveling algorithm that ST recommends to implement in the Flash Translation Layer FTL software for NAND Flash memories. INTRODUCTION In ST NAND Flash memories each physical block can be programmed or erased reliably over 100,000

74VHC04

Abstract: 74VHC04MTR 74VHC04TTR TSSOP14
Contextual Info: 74VHC04 HEX INVERTER • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.8ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE:

74VHC245

Abstract: 74VHC245MTR 74VHC245TTR
Contextual Info: 74VHC245 OCTAL BUS TRANSCEIVER 3-STATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 4.0 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON CONTROL INPUTS