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    10000 SERIES OF ECL GATES Search Results

    10000 SERIES OF ECL GATES Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    100201SCX Rochester Electronics LLC 100201 - OR/NOR Gate, 100K Series, 1-Func, 2-Input, ECL, PDSO8 Visit Rochester Electronics LLC Buy
    MC10105P Rochester Electronics LLC OR/NOR Gate, 10K Series, 3-Func, 3-Input, ECL, PDIP16, PLASTIC, DIP-16 Visit Rochester Electronics LLC Buy
    TLP5702H Toshiba Electronic Devices & Storage Corporation Photocoupler (Gate Driver Coupler), High-Topr / IGBT driver, 5000 Vrms, SO6L Visit Toshiba Electronic Devices & Storage Corporation
    TLP5705H Toshiba Electronic Devices & Storage Corporation Photocoupler (Gate Driver Coupler), High-Topr / IGBT driver, 5000 Vrms, SO6L Visit Toshiba Electronic Devices & Storage Corporation
    TB67H481FTG Toshiba Electronic Devices & Storage Corporation Stepping and Brushed Motor Driver /Bipolar Type / Vout(V)=50 / Iout(A)=3.0 / IN input type / VQFN32 Visit Toshiba Electronic Devices & Storage Corporation

    10000 SERIES OF ECL GATES Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: MC10EP195, MC100EP195 3.3V ECL Programmable Delay Chip The MC10/100EP195 is a programmable delay chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. The delay section consists of a programmable matrix of gates and


    Original     		PDF MC10EP195, MC100EP195 MC10/100EP195 EP195 MC10EP195/D

    MC100EP195

    Abstract: MC100EP195FA MC100EP195FAR2 MC10EP195 MC10EP195FA MC10EP195FAR2 marking EE
    Text: MC10EP195, MC100EP195 3.3V ECL Programmable Delay Chip The MC10/100EP195 is a programmable delay chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. The delay section consists of a programmable matrix of gates and


    Original     		PDF MC10EP195, MC100EP195 MC10/100EP195 EP195 MC10EP195/D MC100EP195 MC100EP195FA MC100EP195FAR2 MC10EP195 MC10EP195FA MC10EP195FAR2 marking EE

    Untitled

    Abstract: No abstract text available
    Text: MC10EP195, MC100EP195 3.3V / 5VĄECL Programmable Delay Chip The MC10/100EP195 is a programmable delay chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. The delay section consists of a programmable matrix of gates and


    Original     		PDF MC10EP195, MC100EP195 MC10/100EP195 EP195 r14525 MC10E195/D

    marking 7850

    Abstract: No abstract text available
    Text: MC10EP195, MC100EP195 3.3V / 5VĄECL Programmable Delay Chip The MC10/100EP195 is a programmable delay chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. The delay section consists of a programmable matrix of gates and


    Original     		PDF MC10EP195, MC100EP195 MC10/100EP195 EP195 r14525 MC10EP195/D marking 7850

    Untitled

    Abstract: No abstract text available
    Text: MC10EP195, MC100EP195 3.3V / 5VĄECL Programmable Delay Chip The MC10/100EP195 is a programmable delay chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. The delay section consists of a programmable matrix of gates and


    Original     		PDF MC10EP195, MC100EP195 MC10/100EP195 EP195 r14525 MC10EP195/D

    MC100EP195

    Abstract: MC100EP195FA MC100EP195FAR2 MC10EP195 MC10EP195FA MC10EP195FAR2
    Text: MC10EP195, MC100EP195 3.3V / 5VĄECL Programmable Delay Chip The MC10/100EP195 is a programmable delay chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. The delay section consists of a programmable matrix of gates and


    Original     		PDF MC10EP195, MC100EP195 MC10/100EP195 EP195 r14525 MC10EP195/D MC100EP195 MC100EP195FA MC100EP195FAR2 MC10EP195 MC10EP195FA MC10EP195FAR2

    ic 4440 circuit diagram

    Abstract: MC100EP195 MC100EP195FA MC100EP195FAR2 MC10EP195 MC10EP195FA MC10EP195FAR2
    Text: MC10EP195, MC100EP195 3.3V / 5VĄECL Programmable Delay Chip The MC10/100EP195 is a programmable delay chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. The delay section consists of a programmable matrix of gates and


    Original     		PDF MC10EP195, MC100EP195 MC10/100EP195 EP195 r14525 MC10EP195/D ic 4440 circuit diagram MC100EP195 MC100EP195FA MC100EP195FAR2 MC10EP195 MC10EP195FA MC10EP195FAR2

    Untitled

    Abstract: No abstract text available
    Text: MC10EP195, MC100EP195 3.3V / 5VĄECL Programmable Delay Chip The MC10/100EP195 is a programmable delay chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. The delay section consists of a programmable matrix of gates and


    Original     		PDF MC10EP195, MC100EP195 MC10/100EP195 EP195 r14525 MC10EP195/D

    2N6284 inverter schematic diagram

    Abstract: NTD18N06 MKP9V160 sine wave inverter tl494 circuit diagram ECL IC NAND adp3121 DARLINGTON TRANSISTOR ARRAY ezairo MC74HC4538 TIP142 6403 F
    Text: ON Semiconductor Master Components Selector Guide AC−DC Controllers and Regulators; Amplifiers and Comparators; Analog Switches; Bipolar Transistors; Clock and Data Distribution; Clock Generation; Custom; DC−DC Controllers, Converters, and Regulators; Digital


    Original     		PDF SG388/D 2N6284 inverter schematic diagram NTD18N06 MKP9V160 sine wave inverter tl494 circuit diagram ECL IC NAND adp3121 DARLINGTON TRANSISTOR ARRAY ezairo MC74HC4538 TIP142 6403 F

    ps5120

    Abstract: No abstract text available
    Text: MC100EP196 3.3V ECL Programmable Delay Chip with FTUNE The MC100EP196 is a programmable delay chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. It has similar architecture to the EP195 with the added feature of further tuneability in


    Original     		PDF MC100EP196 EP195 EP196 BRD8011/D. MC100EP196 AN1405/D AN1406/D AN1503/D AN1504/D ps5120

    Untitled

    Abstract: No abstract text available
    Text: MC100EP196 3.3V ECL Programmable Delay Chip with FTUNE The MC100EP196 is a programmable delay chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. It has similar


    Original     		PDF MC100EP196 MC100EP196 EP195 EP196 MC100EP196/D

    E196

    Abstract: MC100 MC100EP196
    Text: MC100EP196 3.3V ECL Programmable Delay Chip with FTUNE The MC100EP196 is a programmable delay chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. It has similar


    Original     		PDF MC100EP196 MC100EP196 EP195 EP196 MC100EP196/D E196 MC100

    PS-4480 B

    Abstract: E196 MC100 MC100EP196 ps 5040 750MV
    Text: MC100EP196 3.3V ECL Programmable Delay Chip with FTUNE The MC100EP196 is a programmable delay chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. It has similar architecture to the EP195 with the added feature of further tuneability in


    Original     		PDF MC100EP196 MC100EP196 EP195 EP196 MC100EP196/D PS-4480 B E196 MC100 ps 5040 750MV

    E196

    Abstract: MC100 MC100EP196 PS2022
    Text: MC100EP196 3.3V ECL Programmable Delay Chip with FTUNE The MC100EP196 is a programmable delay chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. It has similar


    Original     		PDF MC100EP196 MC100EP196 EP195 EP196 MC100EP196/D E196 MC100 PS2022

    ic 4440 circuit diagram

    Abstract: PS-4480 B PS-4480 ic 4440 pin diagram of ic 4440 E196 MC100 MC100EP196 gd d9 ECL 10000
    Text: MC100EP196 3.3V ECL Programmable Delay Chip with FTUNE The MC100EP196 is a programmable delay chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. It has similar


    Original     		PDF MC100EP196 MC100EP196 EP195 EP196 MC100EP196/D ic 4440 circuit diagram PS-4480 B PS-4480 ic 4440 pin diagram of ic 4440 E196 MC100 gd d9 ECL 10000

    Untitled

    Abstract: No abstract text available
    Text: MC100EP195B 3.3V ECL Programmable Delay Chip Descriptions The MC100EP195B is a Programmable Delay Chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. The delay section consists of a programmable matrix of gates and


    Original     		PDF MC100EP195B MC100EP195B EP195B MC100EP195B/D

    PS-4480 B

    Abstract: No abstract text available
    Text: MC100EP196 3.3V ECL Programmable Delay Chip with FTUNE The MC100EP196 is a programmable delay chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. It has similar architecture to the EP195 with the added feature of further tuneability in


    Original     		PDF MC100EP196 EP195 EP196 MC100EP196/D PS-4480 B

    QFN tray 5x5

    Abstract: 100EP MC100 QFN32 QFN 5x5 tray
    Text: MC100EP195B 3.3V ECL Programmable Delay Chip Descriptions The MC100EP195B is a Programmable Delay Chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. The delay section consists of a programmable matrix of gates and


    Original     		PDF MC100EP195B MC100EP195B EP195B MC100EP195B/D QFN tray 5x5 100EP MC100 QFN32 QFN 5x5 tray

    LQFP-32

    Abstract: MC100 QFN32 QFN-32 PS-4400 EP195B AN1642
    Text: MC100EP195B 3.3V ECL Programmable Delay Chip Descriptions The MC100EP195B is a Programmable Delay Chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. The delay section consists of a programmable matrix of gates and


    Original     		PDF MC100EP195B MC100EP195B EP195B MC100EP195B/D LQFP-32 MC100 QFN32 QFN-32 PS-4400 AN1642

    E196

    Abstract: MC100 MC100EP196
    Text: MC100EP196 3.3V ECL Programmable Delay Chip with FTUNE The MC100EP196 is a programmable delay chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. It has similar architecture to the EP195 with the added feature of further tuneability in


    Original     		PDF MC100EP196 MC100EP196 EP195 EP196 MC100EP196/D E196 MC100

    Untitled

    Abstract: No abstract text available
    Text: MC100EP196 3.3V ECL Programmable Delay Chip with FTUNE The MC100EP196 is a programmable delay chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. It has similar


    Original     		PDF MC100EP196 MC100EP196 EP195 EP196 MC100EP196/D

    PS-4480 B

    Abstract: ic 4440 circuit diagram E196 MC100 MC100EP196
    Text: MC100EP196 3.3V ECL Programmable Delay Chip with FTUNE The MC100EP196 is a programmable delay chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. It has similar architecture to the EP195 with the added feature of further tuneability in


    Original     		PDF MC100EP196 MC100EP196 EP195 EP196 MC100EP196/D PS-4480 B ic 4440 circuit diagram E196 MC100

    Untitled

    Abstract: No abstract text available
    Text: MC100EP196A 3.3 V ECL Programmable Delay Chip With FTUNE The MC100EP196A is a Programmable Delay Chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. It has similar architecture to the EP195 with the added feature of further


    Original     		PDF MC100EP196A MC100EP196A EP195 EP196A MC100EP196A/D

    L42n

    Abstract: HM3500 adb 630 L43n "alu 4 bit" ECL IC NAND L44N PT06-16-8P-S/transistor 03e
    Text: H0NEYWE1_I_/SS ELEK-, MIL [13 I>e | 4551872 DD00212 D • “ H o n eyw e ll r - n - ll'O HM3500, hvmioooo, HE12000 Preliminary ADVANCED DIGITAL BIPOLAR GATE ARRAY FAMILY FAMILY FEATURES • Broad Performance Optimized Family Allows Flexible System Partitioning:


    OCR Scan     		PDF DD00212 HM3500, HE12000 ECL10K/KH/100K 148-Pin MIL-M-38510/600 MIL-STD-883C L42n HM3500 adb 630 L43n "alu 4 bit" ECL IC NAND L44N PT06-16-8P-S/transistor 03e