0X141 Search Results

TCO-2112

Abstract: AD9516
Contextual Info: 14-Output Clock Generator AD9516-5 FEATURES APPLICATIONS Low jitter, low phase noise clock distribution Clock generation and translation for SONET, 10Ge, 10G FC, and other 10 Gbps protocols Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs High performance wireless transceivers

AD5272BCPZ-20-RL7

Abstract: 20k preset variable resistor D0807 AD5274 DB10 JESD-51 rheostat speed control circuit AD5272BRMZ-50 AD5272BRMZ-20 AD5274BCPZ-20-RL7
Contextual Info: 1024-/256-Position, 1% Resistor Tolerance Error, I2C Interface and 50-TP Memory Digital Rheostat AD5272/AD5274 FEATURES FUNCTIONAL BLOCK DIAGRAM VDD POWER-ON RESET RDAC REGISTER SCL SDA I2C SERIAL INTERFACE A 10/8 W 50-TP MEMORY BLOCK ADDR RESET VSS APPLICATIONS

Contextual Info: XR21V1410 1-CH FULL-SPEED USB UART JULY 2013 REV. 1.3.1 GENERAL DESCRIPTION The XR21V1410 V1410 is an enhanced Universal Asynchronous Receiver and Transmitter (UART) with a USB interface. The USB interface is fully compliant to Full Speed USB 2.0 specification that supports 12

Contextual Info: TMS320F28030, TMS320F28031, TMS320F28032 TMS320F28033, TMS320F28034, TMS320F28035 SPRS584F – APRIL 2009 – REVISED OCTOBER 2011 www.ti.com Piccolo Microcontrollers Check for Samples: TMS320F28030, TMS320F28031, TMS320F28032, TMS320F28033, TMS320F28034, TMS320F28035

Contextual Info: TMS320F28055, TMS320F28054, TMS320F28053 TMS320F28052, TMS320F28051, TMS320F28050 www.ti.com SPRS797A – NOVEMBER 2012 – REVISED APRIL 2013 Piccolo Microcontrollers Check for Samples: TMS320F28055, TMS320F28054, TMS320F28053, TMS320F28052, TMS320F28051, TMS320F28050

Contextual Info: Product Folder Sample & Buy Technical Documents Support & Community Tools & Software DRV8308 SLVSCF7 – FEBRUARY 2014 DRV8308 Brushless DC Motor Controller 1 Features 3 Description • The DRV8308 device is a three half-bridge pre-driver that drives up to 130 mA to six N-type MOSFETs with

XR21V1414IM48-F

Contextual Info: XR21V1414 4-CH FULL-SPEED USB UART APRIL 2012 GENERAL DESCRIPTION The XR21V1414 V1414 is an enhanced 4-channel USB Universal Asynchronous Receiver and Transmitter (UART). The USB interface is fully compliant to Full Speed USB 2.0 specification that supports 12 Mbps USB data transfer rate. The USB

TSF 1303

Abstract: MAC-07
Contextual Info: EtherMap -3 Device Ethernet into STS-3/STM-1 SONET/SDH Mapper TXC-04226 DATA SHEET PRODUCT PREVIEW TELECOM BUS SIDE +1.8V +3.3V HO/LO RING Ports APPLICATIONS • • • • • HO/LO POH Ports SONET/SDH add/drop and terminal multiplexers Multi-service access platforms

bq2084-V140

Abstract: bq29312 VIT140 bq2084DBTR-V140 bq2084DBT-V140 bq2084RTTT-V140 bq2084RTT-V140 SET58
Contextual Info: RTT www.ti.com bq2084-V140 DBT SLUS664B – JULY 2005 – REVISED AUGUST 2006 SBS v1.1-COMPLIANT GAS GAUGE FOR USE WITH THE bq29312 FEATURES • • • • • • • • • • • Provides Accurate Measurement of Available Charge in Li-Ion and Li-Polymer Batteries

encoder 200 43

Abstract: TMS320x2806x
Contextual Info: TMS320F28069, TMS320F28068, TMS320F28067, TMS320F28066 TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062 SPRS698B – NOVEMBER 2010 – REVISED JULY 2011 www.ti.com Piccolo Microcontrollers Check for Samples: TMS320F28069, TMS320F28068, TMS320F28067, TMS320F28066,

AD7147

Abstract: proximity_detection_rate AD7142 capacitance sensor sda 5708
Contextual Info: CapTouch Programmable Controller for Single-Electrode Capacitance Sensors AD7147 FEATURES Cell phones Personal music and multimedia players Smart handheld devices Television, A/V, and remote controls Gaming consoles Digital still cameras GENERAL DESCRIPTION

VS1003

Contextual Info: VS1003 VS1003 - MP3/WMA AUDIO CODEC Features Description • Decodes MPEG 1 & 2 audio layer III CBR +VBR +ABR ; WMA 4.0/4.1/7/8/9 all profiles (5-384kbit/s); WAV (PCM + IMA ADPCM); General MIDI / SP-MIDI files • Encodes IMA ADPCM from microphone or line input

Contextual Info: Freescale Semiconductor Application Note Document Number: AN4764 Rev. 0, 8/2013 USB Human Interface Device Boot Loader for ColdFire Plus, Kinetis K, and Kinetis L MCUs 1 Introduction Boot loader is a small program put into a device that allows user application codes to be programmed to the

Contextual Info: APPLICATIONS Low jitter, low phase noise clock distribution 10/40/100 Gb/sec networking line cards, including SONET, Synchronous Ethernet, OTU2/3/4 Forward error correction G.710 Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs High performance wireless transceivers

LMK04828BISQE

Abstract: LMK04828B
Contextual Info: LMK04826B, LMK04828B www.ti.com SNAS605 AP – MARCH 2013 – REVISED JUNE 2013 LMK0482xB Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04826B, LMK04828B 1 INTRODUCTION 1.1 Features 12 • JEDEC JESD204B Support

24c16 eeprom resetting only circuit diagram and d

Abstract: a180, transformer atmel 24c16 SAA7322 intel core i3 MOTHERBOARD CIRCUIT diagram mba mini projects SB82371SB TriMedia TM-1000 ATMEL 220 24C16 trimedia tm1300
Contextual Info: INTEGRATED CIRCUITS TM-1300 Media Processor Product Specification Supersedes data of 2000 May 30 File under INTEGRATED CIRCUITS, TR1 2000 Sep 30 Terms and Conditions TERMS AND CONDITIONS Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes,

F245A

Abstract: UPD4564421 italiana 2000V F244 F245 R4300 VR4300 VR4300TM VRC4373 80 lead flash simm programmer
Contextual Info: V 4373 System Controller RC Data Sheet October 1997 1.0 Introduction 1.1 The VRC4373TM system controller is a software-configurable chip that directly interfaces the VR4300TM CPU and PCI bus without external logic or buffering, and also interfaces memory SDRAM, EDO, fast-page DRAM, and flash boot ROM with minimal buffering. From the viewpoint of the VR4300 CPU, the VRC4373 acts as a memory controller,

16C954

Abstract: OX16C952 16C952 Oxford Semiconductor 16c550 16C550 16C950 IEEE1284 OX16C950 OXMPCI952-LQAG
Contextual Info: OXmPCI952 DATA SHEET Integrated High Performance Dual UARTs, 8-bit Local Bus/Parallel Port. 3.3v PCI/miniPCI interface. FEATURES • • • • • • • • • • • • Dual 16C950 High performance UART channels 8-bit Pass-through Local Bus PCI Bridge

tms 3874

Abstract: RS8228EBG RS8398 Rockwell framer" Trec Part Numbering System GR
Contextual Info: R O C K W E L L Network access S E M I C O N D U C T O R S Y S T E M S RS8228 Octal ATM Transmission Convergence PHY Device datasheett PROVIDING HIGH SPEED MULTIMEDIA CONNECTIONS September 1998 Advance Information This document contains information on a product under development. The parametric information contains target

nte 1037

Abstract: gt-48002a skip 24 evi 10 t3 "filtering database" GT-48001A GT-48002 S7256 0xF8000000
Contextual Info: GT-48002A Preliminary Rev. Revision 1.2 8/19/97 Switched Fast Ethernet Controller for 100BaseX Please contact Galileo Technology for possible updates before finalizing a design. FEATURES • Single-chip, low cost, Switched Fast Ethernet Controller - Provides packet switching functions between two

OX12PCI840-PQC-A

Abstract: PD1 1284 0X00 AD30 IEEE1284 OX12PCI840 NATIONAL 93C46 93C46 national
Contextual Info: OX12PCI840 Integrated Parallel Port and PCI interface FEATURE • • • IEEE1284 SPP/EPP/ECP parallel port Single function target PCI controller, fully PCI 2.2 and PCI Power Management 1.0 compliant 2 multi-purpose IO pins which can be configured as interrupt input pins

sandisk eMMC 4.41

Abstract: toshiba emmc 4.4 spec SANDISK inand Samsung eMMC 4.41 sandisk emmc 4.5 bcm 4330 programming Guide Sandisk iNAND eMMC toshiba emmc 4.4 linux toshiba emmc 4.4.1 spec sandisk inand extreme emmc
Contextual Info: An addendum for this document is available. See Document ID#: IMX25RMAD. i.MX25 Multimedia Applications Processor Reference Manual Supports i.MX251 MCIMX251 i.MX253 (MCIMX253) i.MX255 (MCIMX255) i.MX257 (MCIMX257) i.MX258 (MCIMX258) IMX25RM Rev. 1 06/2009

tag a2

Abstract: ARGB888 CY7C68013A ITU656 RGB565 RGB888 ECP2-50 RGB-16 802.3 CRC32
Contextual Info: LCD-Pro IP user manual UM0011 v1.0 – 14 July 2009 User Manual: Overview This document describes the LCD-Pro IP architecture, including the next cores: UltiEVC display controller, UltiEBB 2D graphic accelerator, UltiEMC DDR memory controller, UltiVidin video input core, UltiDMA DMA controller, UltiSPI2AHB SPI

0X144

Contextual Info: 45 AM S/UNI ATLAS 3200 ATM Layer Solution ASSP Data Sheet Released y, 20 03 06 :2 8: PM7325 id ay ,0 7F eb ru ar S/UNI® ATLAS™ 3200 in er In co n Fr OC-48 S/UNI ATM Layer Solution Released Issue No. 5: January 2003 Do wn lo ad e d by Co nt en tT ea