0X0000000 Search Results

MSL260G

Abstract: MSL-260-G D0806 R0807 T0803 D0802 D0807 RDD0804 D0808 5 pin reset ic ARB
Contextual Info: Using the Intel 80960 CA with the PCI 9060 PCI evaluation board, Schematics PLX TECHNOLOGY PCI9060 Demo Board I/O MAP 06/16/96 PCI Configuration Registers Address BIT Function 0x00000000 0-15 Vendor ID, Allocated to PLX by PCI SIG (Read-only) (Default = 10B5)

0x00000010

Abstract: 0x300000C0 0x0000000b E 32.0000 C 000D 10B5 0x300000C4 0x10000000-0x2FFFFFFF
Contextual Info: PLX Technology PCI9060/68040 DEMO Memory Map 06/24/96 PCI Configuration Registers PCI CFG Offset BIT 0x00000000 0-15 0x00000002 0-15 Function Vendor ID, Allocated to PLX by PCI SIG Read-only (Default = 10B5) Device ID, Allocated by PLX (Read-only) (Default = 9060)

0x00000564

Abstract: 0x00000404 0x00000532 0x0000047C 0x000005BE STI3400 0x0000040A sgs 8 r 15 93CS46 0x0000045C
Contextual Info: PLX Technology SGS PCI MPEG Board I/O MAP 07/15/96 PCI Configuration Registers PCI CFG Offset 0x00000000 0x00000002 BIT 0-15 0-15 Function Vendor ID, Allocated to PLX by PCI SIG Read-only (Default = 10B5) Device ID, Allocated by PLX (Read-only) (Default = 9060)

TO 106 transistor

Contextual Info: DINK autodetect of memory configuration Q: Does DINK auto detect the amount of memory which is installed on the board? A. No. The configuration registers of the MPC105/106 are programmed at POR to a specific value. Bank0 is programmed to start at address 0x00000000 and end at address 0x0007FFFF 8Mb .

1N4148/2 pin connector sip

Abstract: ACT04 MOTOROLA 1N4148 D0805 pal programming sw dip-3 80960CA 15 pin through hole d sub connector 16v8h DIODE MOTOROLA B33 D0805
Contextual Info: Go to next Section: Using the Motorola 68040 Return to Table of Contents Using the Intel 80960 CA with the PCI 9060 PLX evaluation board, Schematics PLX TECHNOLOGY PCI9060 Demo Board I/O MAP 06/16/96 PCI Configuration Registers Address BIT Function 0x00000000

0xD0000000-0xDFFFFFFF

Abstract: 0x80000000-0xBFFFFFFF 80960CA 82596CA 0x20000000-0x2FFFFFFF
Contextual Info: PLX Technology PCI9060 DEMO Memory Map 06/16/96 80960CA Address Space 0x00000000-0x0000003F 0x00000040-0x000000BF 0x000000C0-0x000000FF 0x00000100-0x000003FF 0x00000400-0X0FFFFFFF 0x10000000-0x1FFFFFFF 0x20000000-0x2FFFFFFF 0x30000000-0x3FFFFFFF 0x40000000-0x7FFFFFFF

16V8H-15

Abstract: U0401 20-2136J PT3877 16v8h 1n4148 0805 20V8H IC 4020 512 eeprom dip 32-pin HEADER 10X2
Contextual Info: PLX TECHNOLOGY PCI9060 Demo Board I/O MAP 06/16/96 PCI Configuration Registers Address BIT Function 0x00000000 0-15 Vendor ID, Allocated to PLX by PCI SIG Read-only (Default = 10B5) 0x00000002 0-15 Device ID, Allocated by PLX (Read-only) (Default = 9060)

mip 291

Abstract: mip 290
Contextual Info: SMJ320C80 DIGITAL SIGNAL PROCESSOR SGUS025 – AUGUST 1998 D D D D D D D D D D D D D Single-Chip Parallel Multiple Instruction / Multiple Data MIMD Digital Signal Processor (DSP) More Than Two Billion RISC-Equivalent Operations per Second Master Processor (MP)

of TX6A RX6A

Abstract: RX6A tx2c transmitter RX6a 1211 TX1B TXC-06885 diode GFP AA tx6c TX5b rx5b Ethernet over SONET mapper
Contextual Info: Envoy -CE4 Device SPI-3 to Ethernet Controller TXC-06885 DATA SHEET PRODUCT PREVIEW • 4 Configurable Media Access Controllers MACs • Each MAC is configurable as 8 Fast Ethernet ports (10/100 Mbits/s) or 2 Fast Ethernet ports with extended buffers or 1 Gigabit Ethernet port (10/100/1000 Mbits/s)

Contextual Info: NRND: Not recommended for new designs. TE X AS I NS TRUM E NTS - P RO DUCTION D ATA Stellaris LM3S1B21 Microcontroller D ATA SHE E T D S -LM3S 1B 21 - 1 3 4 4 2 . 2 5 4 9 S P M S 222H C o p yri g h t 2 0 07-2012 Te xa s In stru me n ts In co rporated

Contextual Info: TE X AS I NS TRUM E NTS - P RO DUCTION D ATA Stellaris LM3S9B81 Microcontroller D ATA SHE E T D S -LM3S 9B 81 - 1 5 8 5 2 . 2 7 4 3 S P M S 223J C o p yri g h t 2 0 07-2014 Te xa s In stru me n ts In co rporated Copyright Copyright © 2007-2014 Texas Instruments Incorporated All rights reserved. Stellaris and StellarisWare® are registered trademarks of Texas Instruments

Contextual Info: NRND: Not recommended for new designs. TE X AS I NS TRUM E NTS - P RO DUCTION D ATA Stellaris LM3S5951 Microcontroller D ATA SHE E T D S -LM3S 5951 - 1 3 4 4 2 . 2 5 4 9 S P M S 186M C o p yri g h t 2 0 07-2012 Te xa s In stru me n ts In co rporated

tube 6G6

Contextual Info: OBSOLETE: TI has discontinued production of this device. TE X AS I NS TRUM E NTS - P RO DUCTION D ATA Stellaris LM3S6G65 Microcontroller D ATA SHE E T D S -LM3S 6G6 5 - 1 2 9 8 6 . 2 5 3 2 S P M S 269B C o p yri g h t 2 0 07-2012 Te xa s In stru me n ts In co rporated

Contextual Info: TE X AS I NS TRUM E NTS - P RO DUCTION D ATA Stellaris LM3S5D56 Microcontroller D ATA SHE E T D S -LM3S 5D 56 - 1 5 8 5 2 . 2 7 4 3 S P M S 242C C o p yri g h t 2 0 07-2014 Te xa s In stru me n ts In co rporated Copyright Copyright © 2007-2014 Texas Instruments Incorporated All rights reserved. Stellaris and StellarisWare® are registered trademarks of Texas Instruments

m1 250c fuse

Abstract: at32uc3c em 234 stepper dtx 370 DTH block diagram lta 301 VT 546 Modem basic circuit diagram EIC 4021 shift registers 4050
Contextual Info: Features • High Performance, Low Power 32-bit AVR Microcontroller – – – – • • • • • • • • • • • • Compact Single-cycle RISC Instruction Set Including DSP Instruction Set Built-in Floating-Point Processing Unit FPU Read-Modify-Write Instructions and Atomic Bit Manipulation

am3r2

Abstract: ID HD TO SATA CONVERT PIN CIRCUIT SB800 sb850 SB820M amd SB800 amd sb800 Register Programming Requirements AMD sb850 Southbridge sb8x
Contextual Info: AMD SB800-Series Southbridges Register Programming Requirements Technical Reference Manual Rev. 3.02 P/N: 45481_SB800_rpr_pub_3.02  2011 Advanced Micro Devices, Inc. . Trademarks AMD, the AMD Arrow logo, and combinations thereof are trademarks of Advanced Micro Devices, Inc.

TMPM374

Abstract: TMPM373 TMPM374FWUG LQFP-64P ADR-301 TMPM372 3shunt TMPM373FWDUG 3 phase sine wave pwm circuit LQFP48-P-0707-0
Contextual Info: 32-bit RISC Microcontroller TX03 Series TMPM372FWUG TMPM373FWDUG TMPM374FWUG Semiconductor & Storage Products Company Revision History Rev 1 Date 2011/8/1 Description First Release TMPM372 / 373 / 374 *

virtual surround dsp mcu

Abstract: CS48520 AN298PPMN NEO-6 8Kx32 AN298PPMC AN2988 6Kx32 AN298 AN298PPMQ
Contextual Info: AN298 0CS48xxxx Firmware User’s Manual General Overview & Common Firmware Modules Contents Overview • Document Strategy AN298 provides a description of the operation of firmware for the CS48xxxx family of DSPs. This document gives a general overview to the family of

MAX9263

Abstract: MAX9264 prng IEC ACB symbols PJ 62 SPREAD-SPECTRUM SYSTEM
Contextual Info: 19-5644; Rev 1; 3/11 TION KIT EVALUA BLE IL AVA A HDCP Gigabit Multimedia Serial Link Serializer/Deserializer The MAX9263/MAX9264 chipset extends Maxim’s gigabit multimedia serial link GMSL technology to include highbandwidth digital content protection (HDCP) encryption

PCI-to-ISA

Abstract: 8888 IDSEL
Contextual Info: Application Note Driver Is Not Necessary for 8888 Apr. 26, 2005 Reversion History Reversion Change List 1.0 Note Initial version General Situation The standard purpose of 8888 is to be designed on motherboard. According to Intel ICHx specifications, if AD22 is connected to IDSEL, the ISA-bridge can be hidden. Please refer

AD9914

Abstract: ad9914bcpz polar modulator 32DDS hexadecimal 978MHz 2.4GHZ synthesizer
Contextual Info: 3.5 GSPS Direct Digital Synthesizer with 12-Bit DAC AD9914 Data Sheet FEATURES 1.8 V/3.3 V power supplies Software and hardware controlled power-down 88-lead LFCSP package PLL REF CLK multiplier Phase modulation capability Amplitude modulation capability 3.5 GSPS internal clock speed

radar detector detector 10-25 ghz

Abstract: A7- B14 Radar Warning Receiver 6 pin DCI DCI circuit diagram ADF4350 TCI-1-13M AD9129 AD9129-MIX-EBZ nsd 102
Contextual Info: Preliminary Technical Data FEATURES DAC Update Rate of up to 5.6 GSPS Direct RF Synthesis @ 2.8 GSPS Data Rate DC-to-1.4 GHz in Baseband Mode DC-to-1.0 GHz in 2x Interpolation Mode 1.4 to 4.2 GHz in Mix-Mode Bypassable 2x Interpolation Excellent Dynamic performance

AT91SAM3U4

Abstract: at91sam3 1N1308 MAR 735 REGULATOR IC 7912 pin identify AT91SAM3U4E SAM3u1 AT91SAM3U 3961 G.E 0x20180
Contextual Info: Features • Core • • • • • • – ARM Cortex®-M3 revision 2.0 running at up to 96 MHz – Memory Protection Unit MPU – Thumb®-2 instruction set Memories – From 64 to 256 Kbytes embedded Flash, 128-bit wide access, memory accelerator,

Socket S1g1

Abstract: AMD Turion 64 Mobile Technology AM2 amd amd AM2 opteron pin package HTC B834 Socket S1g1 Processor Functional AMD SEMPRON 3000 socket 754 DIAGRAM SEMPRON Socket 754 AM2 31117 CMPXCHG16B
Contextual Info: BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors Publication # 32559 Revision: 3.16 Issue Date: November 2009 2005-2009 Advanced Micro Devices, Inc. All rights reserved. The contents of this document are provided in connection with Advanced Micro Devices,