CPC700
Abstract: Extended PCI Arbiter 45L7530
Text: CPC700 dd1.x Errata List and Advisories May 8, 2003 Version 1.44 IBM Microelectronics 4400 Silicon Drive Research Triangle Park, NC 27709 ppcsupp@us.ibm.com http://www.chips.ibm.com 919 543-5701 This document describes the errata associated with revisions 1.x of the IBM25CPC700*B3AXX (CPC700).
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CPC700
IBM25CPC700
CPC700)
Extended PCI Arbiter
45L7530
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IBM25CPC700BB3A661
Abstract: DH19 IBM25CPC700BB3A66 45L7531 marking AE02 MARKING CODE DH09 45L7530 CPC700 marking dh10 A31 H07
Text: . CPC700 Memory Controller and PCI Bridge Features • PowerPC 60x/7xx bus. • 66.66 MHz IBM25CPC700BB3A66 . • 83.33 MHz (IBM25CPC700BB3B83). • Synchronous DRAM interface operates at the processor bus speed with support for ECC. • PCI Revision 2.1 Compliant Interface.
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CPC700
60x/7xx
IBM25CPC700BB3A66)
IBM25CPC700BB3B83)
32-bit
25MHz
IBM25CPC700BB3A661
DH19
IBM25CPC700BB3A66
45L7531
marking AE02
MARKING CODE DH09
45L7530
marking dh10
A31 H07
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IBM25CPC700DB3A83
Abstract: ae02 marking DH06 marking CODE W04 CPC700 DH02 IBM25CPC700DB3A83Z dh03 dh04 DL05
Text: . CPC700 Memory Controller and PCI Bridge Features • PowerPC 60x/7xx bus. • 66.66 MHz • 83.33 MHz • Synchronous DRAM interface operates at the processor bus speed with support for ECC. • PCI Revision 2.1 Compliant Interface. • Supports independent primary and secondary
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Original
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PDF
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CPC700
60x/7xx
CPC700
IBM25CPC700DB3A83
ae02 marking
DH06
marking CODE W04
DH02
IBM25CPC700DB3A83Z
dh03
dh04
DL05
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IBM25CPC700DB3A83
Abstract: DH27 DH06 DH07 IBM25CPC700DB3A83Z ae02 marking dh03 marking CODE W04 ae09 MARKING CODE k07
Text: . CPC700 Memory Controller and PCI Bridge Features • PowerPC 60x/7xx bus. • 66.66 MHz • 83.33 MHz • Synchronous DRAM interface operates at the processor bus speed with support for ECC. • PCI Revision 2.1 Compliant Interface. • ROM/SRAM/External peripheral controller.
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Original
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PDF
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CPC700
60x/7xx
32-bit
25MHz
CPC700
IBM25CPC700DB3A83
DH27
DH06
DH07
IBM25CPC700DB3A83Z
ae02 marking
dh03
marking CODE W04
ae09
MARKING CODE k07
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b09 n03
Abstract: MDATA62 DH03 DH-04 aa09
Text: . CPC700 Memory Controller and PCI Bridge Features map essential to making it appear like a device but does not preclude it from being a host. • PowerPC 60x/7xx bus. • 66.66 MHz IBM25CPC700BB3B66 . • 83.33 MHz (IBM25CPC700BB3B83). • Synchronous DRAM interface operates at the
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Original
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PDF
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CPC700
60x/7xx
IBM25CPC700BB3B66)
IBM25CPC700BB3B83)
32-bit
25MHz
b09 n03
MDATA62
DH03
DH-04
aa09
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dh03
Abstract: DH07 DH09 AB-04 MDATA62 dh23 AD-05 T14 N03 w04 68 mark w06
Text: . CPC700 Memory Controller and PCI Bridge Features map essential to making it appear like a device but does not preclude it from being a host. • PowerPC 60x/7xx bus. • 66.66 MHz. • 83.33 MHz. • Synchronous DRAM interface operates at the processor bus speed with support for ECC.
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Original
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PDF
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CPC700
60x/7xx
32-bit
25MHz
dh03
DH07
DH09
AB-04
MDATA62
dh23
AD-05
T14 N03
w04 68
mark w06
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AA09
Abstract: AA07 t04 68 3 pin controller IBM25CPC700CB3B66 DH06 A09 N03 CPC700 IBM25CPC700BB3B66 IBM25CPC700BB3B83 DH07
Text: . CPC700 Memory Controller and PCI Bridge Features map essential to making it appear like a device but does not preclude it from being a host. • PowerPC 60x/7xx bus. • 66.66 MHz IBM25CPC700BB3B66 . • 83.33 MHz (IBM25CPC700BB3B83). • Synchronous DRAM interface operates at the
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Original
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PDF
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CPC700
60x/7xx
IBM25CPC700BB3B66)
IBM25CPC700BB3B83)
CPC700
AA09
AA07
t04 68 3 pin controller
IBM25CPC700CB3B66
DH06
A09 N03
IBM25CPC700BB3B66
IBM25CPC700BB3B83
DH07
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