076E06 Search Results

marx

Contextual Info: ZMD-Standard August 1997 Package SOP14 150 mil MDS 748 Dimensions in millimetres Based on IEC 191-2Q: Type 076E06S 1 Dimensions View X 0,1 LP A1 Z HE E 14 1 D Dimensions of Sub-Group B1 Dimensions of Sub-Group C1 Amax 1,73 Amin 1,55 bPmin 0,35 A1min 0,127

HEF4541B

Abstract: HEF4541BP 10Vd-D HEF4541BT hef4541 400VDD
Contextual Info: HEF4541B Programmable timer Rev. 4 — 25 June 2012 Product data sheet 1. General description The HEF4541B is a programmable timer which consists of a 16-stage binary counter, an integrated oscillator to be used with external timing components, an automatic power-on

74hc733

Abstract: 74HC73 74HC73N 74HC73D 74HC73DB 74HC73PW JESD22-A114E SSOP14 SSOP14 package
Contextual Info: 74HC73 Dual JK flip-flop with reset; negative-edge trigger Rev. 04 — 19 March 2008 Product data sheet 1. General description The 74HC73 is a high-speed Si-gate CMOS device that complies with JEDEC standard no. 7A. It is pin compatible with Low-power Schottky TTL LSTTL .

21A1

Abstract: 74LV125DB 74HC125 74HCT125 74LV125 74LV125D 74LV125N 74LV125PW JESD22-A114E
Contextual Info: 74LV125 Quad buffer/line driver; 3-state Rev. 03 — 7 April 2009 Product data sheet 1. General description The 74LV125 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC125 and 74HCT125. The 74LV125 provides four non-inverting buffer/line drivers with 3-state outputs. The

AHCT32

Abstract: 74AHC32 74AHC32BQ 74AHC32D 74AHC32PW 74AHCT32 TSSOP14
Contextual Info: 74AHC32; 74AHCT32 Quad 2-input OR gate Rev. 04 — 22 May 2008 Product data sheet 1. General description The 74AHC32; 74AHCT32 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard

HEF4001BP

Abstract: datasheet of HEF4001BP HEF4001* OR HEF4001BT HEF4001B JESD22-A114E MO-001
Contextual Info: HEF4001B Quad 2-input NOR gate Rev. 05 — 27 March 2008 Product data sheet 1. General description The HEF4001B is a quad 2-input NOR gate. The outputs are fully buffered for the highest noise immunity and pattern insensitivity to output impedance. It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS

CBT3126

Abstract: CBT3126D CBT3126DB CBT3126DS CBT3126PW JESD22-A114E JESD78 sot337-1and sot403-1and
Contextual Info: CBT3126 Quad FET bus switch Rev. 03 — 9 December 2008 Product data sheet 1. General description The CBT3126 is a quad FET bus switch with independent line switches. Each switch is disabled when the associated Output Enable OE input is LOW. The CBT3126 is characterized for operation from −40 °C to +85 °C.

2A5-10

Abstract: 74AHC02BQ 74AHC02 74AHC02D 74AHC02PW 74AHCT02 TSSOP14
Contextual Info: 74AHC02; 74AHCT02 Quad 2-input NOR gate Rev. 04 — 21 May 2008 Product data sheet 1. General description The 74AHC02; 74AHCT02 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard

PA9543A

Abstract: smd IC 43B smd transistor 43B JESD22-A114 JESD22-A115 JESD78 PCA9543A
Contextual Info: PCA9543A/43B/43C 2-channel I2C-bus switch with interrupt logic and reset Rev. 06 — 15 June 2009 Product data sheet 1. General description The PCA9543A/43B/43C is a bidirectional translating switch, controlled by the I2C-bus. The SCL/SDA upstream pair fans out to two downstream pairs, or channels. Any

TJA1054A

Abstract: PCA82C252 PCA82C252T TJA1053 TJA1053T TJA1054 TJA1054AT TJA1054AU TJA1054T CAN-H11
Contextual Info: TJA1054A Fault-tolerant CAN transceiver Rev. 04 — 2 January 2007 Product data sheet 1. General description The TJA1054A is the interface between the protocol controller and the physical bus wires in a Controller Area Network CAN . It is primarily intended for low-speed applications up

74HC27

Abstract: dhvqfn14 74HC27N 74HC27BQ 74HC27D 74HC27DB 74HC27PW 74HCT27 JESD22-A114E HCT273
Contextual Info: 74HC27; 74HCT27 Triple 3-input NOR gate Rev. 03 — 7 January 2008 Product data sheet 1. General description The 74HC27; 74HCT27 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL LSTTL . The 74HC27; 74HCT27 provides the 3-input NOR function.

AHCT00

Abstract: 74AHC00D 74AHC00 74AHC00BQ 74AHC00PW 74AHCT00 TSSOP14
Contextual Info: 74AHC00; 74AHCT00 Quad 2-input NAND gate Rev. 04 — 28 April 2008 Product data sheet 1. General description The 74AHC00; 74AHCT00 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC

dhvqfn14

Abstract: 74HC32 74HCT32 74LV32 74LV32D 74LV32DB 74LV32N 74LV32PW JESD22-A114E
Contextual Info: 74LV32 Quad 2-input OR gate Rev. 03 — 9 November 2007 Product data sheet 1. General description The 74LV32 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC32 and 74HCT32. The 74LV32 provides a quad 2-input OR function. 2. Features

HEF4081BP

Abstract: HEF4081BT HEF4081B MO-001
Contextual Info: HEF4081B Quad 2-input AND gate Rev. 05 — 29 June 2009 Product data sheet 1. General description The HEF4081B is a quad 2-input AND gate. The outputs are fully buffered for highest noise immunity and pattern insensitivity to output impedance variations. It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS

BSN254

Abstract: vn 530 sp 31 x 132 SSOP16 TEA1118 TEA1118A TEA1118AM TEA1118AT TEA1118M TEA1118T TX1012
Contextual Info: INTEGRATED CIRCUITS DATA SHEET TEA1118; TEA1118A Versatile cordless transmisssion circuit Product specification Supersedes data of 1996 Nov 26 File under Integrated Circuits, IC03 1997 Jul 14 Philips Semiconductors Product specification Versatile cordless transmisssion circuit

dhvqfn14 footprint

Abstract: 74AHC14 74AHCT14 sot762 footprint 74AHC14-74AHCT14 74AHC 74AHC14D 74AHC14PW 74AHCT 74AHCT14D
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74AHC14; 74AHCT14 Hex inverting Schmitt trigger Product specification Supersedes data of 1999 Sep 27 2003 May 26 Philips Semiconductors Product specification Hex inverting Schmitt trigger 74AHC14; 74AHCT14 FEATURES DESCRIPTION

dhvqfn14 footprint

Abstract: 74ALVC00 74ALVC00BQ 74ALVC00D 74ALVC00PW DHVQFN14 TSSOP14 sot762 footprint SOT762-1 AN01026
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74ALVC00 Quad 2-input NAND gate Product specification Supersedes data of 2003 Feb 06 2003 May 14 Philips Semiconductors Product specification Quad 2-input NAND gate 74ALVC00 FEATURES DESCRIPTION • Wide supply voltage range from 1.65 to 3.6 V

MDB105

Abstract: sot762 footprint MNA423 74ALVC74 74ALVC74BQ 74ALVC74D 74ALVC74PW DHVQFN14 TSSOP14 2SD92
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74ALVC74 Dual D-type flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of 2003 Jan 24 2003 May 26 Philips Semiconductors Product specification Dual D-type flip-flop with set and reset;

74HC164N PIN DIAGRAM

Abstract: 74hc164n 74HCT164 application note 74HC164 74HCT164 74HCT164BQ 74HC164D 74HC164DB 74HCT164D 74HCT164DB
Contextual Info: 74HC164; 74HCT164 8-bit serial-in, parallel-out shift register Rev. 5 — 25 November 2010 Product data sheet 1. General description The 74HC164; 74HCT164 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL LSTTL . They are specified in compliance with JEDEC

HEF40106BP

Abstract: HEF40106B HEF40106BT HEF40106 MO-001
Contextual Info: HEF40106B Hex inverting Schmitt trigger Rev. 4 — 15 November 2010 Product data sheet 1. General description The HEF40106B provides six inverting buffers. Each input has a Schmitt trigger circuit. The inverting buffer switches at different points for positive-going and negative-going

74HCU04

Abstract: 74HCu04 oscillator application note dhvqfn14 NXP 74HCU04D 74HCU04D 74HCU04DB 74HCU04N 74HCU04PW
Contextual Info: 74HCU04 Hex inverter Rev. 3 — 16 September 2010 Product data sheet 1. General description The 74HCU04 is high-speed Si-gate CMOS devices and is pin compatible with low power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard No. 7A.

74HC7014-Q100

Contextual Info: 74HC7014-Q100 Hex non-inverting precision Schmitt-trigger Rev. 1 — 26 May 2014 Product data sheet 1. General description The 74HC7014-Q100 is a hex buffer with precision Schmitt-trigger inputs. The precisely defined trigger levels are lying in a window between 0.55  VCC and 0.65  VCC. It makes

Contextual Info: 74HC393-Q100; 74HCT393-Q100 Dual 4-bit binary ripple counter Rev. 1 — 19 June 2014 Product data sheet 1. General description The 74HC393-Q100; 7474HCT393-Q100 is a dual 4-stage binary ripple counter. Each counter features a clock input nCP , an overriding asynchronous master reset input

Contextual Info: HEF4070B-Q100 Quad 2-input EXCLUSIVE-OR gate Rev. 1 — 22 May 2014 Product data sheet 1. General description The HEF4070B-Q100 is a quad 2-input EXCLUSIVE-OR gate. The outputs are fully buffered for the highest noise immunity and pattern insensitivity to output impedance.