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    LH1156AT

    Abstract: lh1156 721a 723 triac
    Text: A T & T MELEC I C 25E D • 005002b HIGH-VOLTAGE SOLID-STATE RELAY 00027=10 S ■ LH1156AT T-V /-S 3 Description The LH1156AT High-Voltage Solid-State Relay is a single-pole, normally-open switch (1 Form A), which can replace mechanical relays in many applications. The relay features logic-level Input control of isolated high-voltage switch


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    PDF 005002b LH1156AT LH1156AT 00S0D2b 0D027TS lh1156 721a 723 triac

    uss-620

    Abstract: No abstract text available
    Text: Advance Data Sheet, Rev. 4 October 1997 microelectronics group Lucent Technologies Bell Labs Innovations USS-620 USB Device Controller with DMA Bridge Features 5 V tolerant I/O buffers allows operation in 3 V or 5 V system environment • Full compliance with the Universal Serial Bus


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    PDF USS-620 100-pin 16-bit DS97-108CMPR-04 uss-620

    Untitled

    Abstract: No abstract text available
    Text: AT&T Data Sheet October 1995 Microelectronics Optimized Reconfigurable Cell Array ORCA 2C Series Field-Programmable Gate Arrays Features Description • High-performance, cost-effective 0.5 |im technology (four-input look-up table delay less than 3.6 ns)


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    PDF ATT2C04, ATT2C06, ATT2C08, ATT2C10, ATT2C12, ATT2C15, ATT2C26, ATT2C40. DS95-183FPGA DS95-031

    Untitled

    Abstract: No abstract text available
    Text: Preliminary Data Sheet July 1995 m A T& T Microelectronics DSP1605 Digital Signal Processor 1 Features 2 Description • For 5 V operation: — 25 ns instruction cycle time 40 MIPS — 30 ns instruction cycle time (33 MIPS) ■ For 3.3 V operation: — 31.25 ns instruction cycle time (32 MIPS)


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    PDF DSP1605 16-bit 36-bit 005002b 001bb5b

    DSP16A

    Abstract: WE DSP16A dsp16a user guide we dsp32 at&t dsp dsp32c G010343 XWXX "saturation value" xlxxx
    Text: A T & T HELEC I C bME D • D D S D O S b D D 1 0 32 7 77^ M A T T E INTRODUCTION Architecture 1. INTRODUCTION The WE DSP16A Digital Signal Processor is a 16-bit, high-performance, CMOS integrated circuit. This device can be programmed to perform a wide variety of signal-processing functions. This is the DSP


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    PDF 005002b DSP16A 16-bit, 16-bit 36-bit WE DSP16A dsp16a user guide we dsp32 at&t dsp dsp32c G010343 XWXX "saturation value" xlxxx

    Untitled

    Abstract: No abstract text available
    Text: Data Sheet August 1996 microelectronics group Lucent Technologies Bell Labs Innovations ORCA OR2CxxA 5.0 V and OR2TxxA (3.3 V) Series Field-Programmable Gate Arrays Features • Flip-flop/latch options to allow programmable prior­ ity of synchronous set/reset vs. clock enable


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    PDF DS96-140FPG DS96-025FPGA) QQS110B

    lb122

    Abstract: LH1150AAM LH1150BAM LH1150CAM
    Text: A T & T MELEC SSE D I C m INTEGRATED SECONDARY PROTECTORS GGSGOEb 0002031 4 • LH1150-TYPE T'éZ 'H Description The LH1150-Type Integrated Secondary Protectors (ISPs) are a family of two-wire, bidirectional, overvoltage protection devices. Each circuit contains diode steering, threshold sensing, a thyristor predriver, and shunting devices. Internal


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    PDF SG02b GG02fl31 LH1150-TYPE LH1150-Type GQ02fl37 LH1150-TYPE_ LH1150AAM LH1150BAM LH1150CAM lb122

    JC100A

    Abstract: jc050a1 JC100A1
    Text: Data Sheet August 1998 Lucent Technologies Bell Labs Innovations JC050A, JC075A, JC100A Power Modules: dc-dc Converters; 18 Vdc to 36 Vdc Input, 5 Vdc Output; 50 W to 100 W Features • Small size: 61.0 mm x 57.9 mm x 12.7 mm 2.40 in. x 2.28 in. x 0.50 in.


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    PDF JC050A, JC075A, JC100A DS97-550EPS DG3713G jc050a1 JC100A1

    design of 18 x 16 barrel shifter in computer arch

    Abstract: DSP1610 DSP16A PDA30 gg12454 dsp dc drive DSP16 DB9 pin configuration f12p at&t dsp1610
    Text: ^ AT&T Preliminary Data Sheet March 1993 . Microelectronics DSP1610 Signal Coding Digital Signal Processor 1.0 Features 2.0 Description • 25 ns or 33 ns instruction cycle ■ 512 word boot ROM, and 4 Kword or 8 Kword downloadable dual-port RAM on-chip


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    PDF DSP1610 16x16-bit 36-bit 05j/0 005002t) design of 18 x 16 barrel shifter in computer arch DSP16A PDA30 gg12454 dsp dc drive DSP16 DB9 pin configuration f12p at&t dsp1610

    ATT2C12

    Abstract: OA50 diodes
    Text: Data Sheet March 1995 AT&T Microelectronics Optimized Reconfigurable Cell Array ORCA 2C Series Field-Programmable Gate Arrays Features Description • High-performance, cost-effective 0.5 firm technology (four-input look-up table delay less than 3.6 ns)


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    PDF ATT2C04, ATT2C06, ATT2C08, ATT2C10, ATT2C12, ATT2C15, ATT2C26, ATT2C40. 240-Pin S240/ ATT2C12 OA50 diodes

    Untitled

    Abstract: No abstract text available
    Text: Preliminary Data Sheet September 1997 m i cro e le ctr o n ic s group Lucent Technologies Bell Labs Innovations LUC3M08 Eight Ethernet MACs for 10/100 Mbits/s Frame Switching Features • Eight 10/100 Mbits/s Ethernet MACs integrated together with separate transmit and receive port


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    PDF LUC3M08 10Base-T, 100Base-T4, 64-bit344 DS97-478LAN DS96-124LAN) 05002b 002fl0b5

    Untitled

    Abstract: No abstract text available
    Text: Microelectronics T7289A DS1 Line Interface Features Description • Fully integrated DS1 line interface The T7289A DS1 Line Interface is an integrated cir­ cuit that provides a line interface between the DS1 crossconnect DSX and terminal equipment circuits


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    PDF T7289A 22-gauge, 28-pin, T7289, LC1046A, LC1046C

    V32-INTFC2

    Abstract: MJ-17 6mj6 DSP16A T7525 MJ-54 TGS 822 MJ-39 HSM192LD marking AFC1
    Text: A T & T MELEC I C bME D • ÜDSGÜ2b □□□c]fl3b SD3 M A T T S AIUT Data Sheet June 4,1993 Microelectronics AT&T HSM192xD Data Pump Chip Sets (19,200 bits/s Data/FAX, Parallel Data Mode, ROM Code MJ) Introduction The AT&T HSM192xD Data Pump Chip Sets


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    PDF HSM192xD 32terbo 32bis 100-Pin V32-INTFC2 28-Pin V32-INTFC2 MJ-17 6mj6 DSP16A T7525 MJ-54 TGS 822 MJ-39 HSM192LD marking AFC1

    lt228

    Abstract: b433 resonator CD 4017 PIN DIAGRAM SDL 4007 TT 2146 4043-C DB3C 828 F3L3 AB14C wy 413
    Text: Preliminary Data Sheet i uy ü AT&T Microelectronics DSP1604/06 Digital Signal Processor •I 1 Features 2 Description ■ For 5 V operation: — 25 ns instruction cycle time 40 MIPS — 30 ns instruction cycle time (33 MIPS) ■ For 3.3 V operation: — 31.25 ns instruction cycle time (32 MIPS)


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    PDF DSP1604/06 DSP1606, DSP1604 16-bit 36-bit 005002b 001bS34 lt228 b433 resonator CD 4017 PIN DIAGRAM SDL 4007 TT 2146 4043-C DB3C 828 F3L3 AB14C wy 413

    PBII MIL-STD-810E

    Abstract: R6C12
    Text: Lucent Technologies Bell Labs Innovations Optimized Reconfigurable Cell Array ORCA ATT2Cxx Series Field-Programmable Gate Arrays Features Description • High-performance, cost-effective 0.5 jim technology (four-input look-up table delay less than 3.6 ns)


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    PDF S240/ PS240 256-Pin 304-Pln S304/ PS304 364-Pin 428-Pin ATT2C15, ATT2C26 PBII MIL-STD-810E R6C12

    Untitled

    Abstract: No abstract text available
    Text: Data Sheet March 1997 microelectronics group Lucent Technologies Bell Labs Innovations L7581 Ringing Access Switch Features • Small size/surface-mount packaging ■ Monolithic IC reliability ■ Low impulse noise ■ Make-before-break, break-before-make operation


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    PDF L7581 DS97-198ALC DS97-007A

    Untitled

    Abstract: No abstract text available
    Text: Preliminary Data Sheet May 1997 microelectronics group Lucent Technologies Bell Labs Innovations T7698 QuadT1/E1 Line Interface and Octal T1/E1 Monitor Features • Fully integrated quad T1/E1 line transceiver and octal T1/E1 receive framer/monitor with HDLC pro­


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    PDF T7698 CB119 TR54016 TR-TSY-000170 TR-TSY000009 TR-TSY-000499, TR-TSY-000253; 005002b 002b740

    v.32terbo 16800 19200 modem

    Abstract: No abstract text available
    Text: A T & T MELEC I C b4E ]> • ÜDSGÜSb 0GCHfl3Li SD3 M A T T S A Data Sheet June 4,1993 a iu t Microelectronics AT&T HSM192xD Data Pump Chip Sets (19,200 bits/s Data/FAX, Parallel Data Mode, ROM Code MJ) Introduction Features The AT&T HSM192xD Data Pump Chip Sets


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    PDF HSM192xD 32terbo 32bis appropriaSP16A T752S 84-Pin 28-Pin v.32terbo 16800 19200 modem

    Untitled

    Abstract: No abstract text available
    Text: microelectronics Preliminary Data Sheet November 1998 group Lucent Technologies Bell Labs Innovations TFRA08C13 Octal T1/E1 Framer Features Facility Data Link Features • Eight independent T1/E1 transmit and receive framers. m Internal DS1 transmit clock synthesis—no external


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    PDF TFRA08C13 DS99-039T1E1 DS98-282TÃ 005002b

    Lucent dw025acl-m

    Abstract: lucent DC-DC POWER MODULE DW025ABK-M DW025ACL-M B866
    Text: Data Sheet June 1997 microelectronics group Lucent Technologies Bell Labs Innovations DW025 Triple Output-Series Power Modules: 36 Vdc to 75 Vdc Input; 25 W Options • Short pins: 2.79 mm ± 0.25 mm 0.110 in.±0.010 in. ■ Negative logic remote on/off


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    PDF DW025 DW025Triple Cert4260 MHSTxxx45 MHSLxxx45 Lucent dw025acl-m lucent DC-DC POWER MODULE DW025ABK-M DW025ACL-M B866

    Untitled

    Abstract: No abstract text available
    Text: Preliminary Data Sheet October 1997 microelectronics group Lucent Technologies Bell Labs Innovations T7630 DualT1/E1 Short-Haul Terminator Terminator-ll Features • Two independent T1/E1 channels each consisting of aT1/E1 short-haul line interface and aT1/E1


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    PDF T7630 TR-TSY-000194 005002b 0Q2fl71fl ZCS47 0050G2b