000XBWHERE Search Results

tc 97101

Abstract: D472
Contextual Info: ADVANCE M IC B D N I ' I 4 MEG BURST EDO DRAM MODULE MT9LD272 B N , MT18LD472 B(N) 72 BURST ED0 DRAM MODULES 2, 4 MEG X 72 16, 32 MEGABYTE, 3.3V, ECC, BURST EDO FEATURES • • • • • • • • • 168-pin, dual-in-line memory module (DIMM) ECC pin-out

Contextual Info: ADVANCE M ld C a a iM I MT2D T 132 B, MT4D232 B, MT8D432 B 2, 4 MEG X 32 BURST EDO DRAM MODULES 1, BURST EDO DRAM MODULE 1,2,4 MEG x 32 4, 8, 16 MEGABYTE, 5V, BURST EDO FEATURES • 72-pin, single-in-lihe memory module (SIMM) • Burst EDO order, interleave or linear, programmed by

B9535

Abstract: 1M16
Contextual Info: PRELIMINARY MT4LC1 M16H5 1 MEG x 16 BURST EDO DRAM BURST EDO DRAM 1 MEG x 16 FEATURES PIN ASSIGNMENT Top View • B urst order, interleave or linear, p ro gram m ed by executing W CBR cycle after initialization • Sin gle p o w er su p p ly : +3.3V ±5%

Contextual Info: ADVANCE jp il r p n M MT9LD272 B N , MT18LD472 B(N) 2, 4 MEG X 72 BURST EDO DRAM MODULES BURST EDO IDRAM MODULE 2, 4 MEG x 72 16,32 MEGABYTE, 3.3V,ECC, BURST EDO FEATURES • • • • • • • • • 168-pin, d ual-in-line m em ory m odule (D IM M )

WT6L

Abstract: MT81D264
Contextual Info: ADVANCE MT4LD T 164 B(N), MT8LD264 B(N), MT16LD464 B(N) 1, 2, 4 MEG x 64 RURST EDO DRAM MODULES p ilC R O N 1,2, 4 MEG x 64 BURST EDO DRAM MODULE 8, 16, 32 MEGABYTE, 3.3V, BURST EDO FEATURES PIN ASSIGNMENT (Front View) 168-Pin DIMM • 168-pin, dual-in-line m em ory module (DIMM)

T2D 53

Abstract: T2D 70 T2D 35 "T2D" T2D 30 T2D 66 T2D 17 T2D 32 marking T2D T2D 31
Contextual Info: 7 ADVANCE M T2D T 132 B, M T4D232 B, M T8D432 B 2, 4 MEG X 32 B U R S T EDO DRAM M O D U LE S BURST EDO DRAM MODULE 1, 2, 4 MEG X 32 4 , 8 16 MEpABYT£, 5V, BURST EDO V FEATURES • 72-pin, single-in-line m emory module (SIMM) • Burst EDO order, interleave or linear, programmed by

MT4LC4M4G6

Contextual Info: PRELIMINARY MT4LC4M4G6 4 MEG x 4 BURST EDO DRAM 4 MEG x 4 BURST EDO DRAM FEATURES PIN ASSIGNMENT Top View • Burst order, interleave or linear, program m ed by executing WCBR cycle after initialization • Single pow er supply: +3.3V ±5% • All inputs a n d o u tp u ts are LVTTL com patible w ith 5V

Contextual Info: ADVANCE M • ir S D N MT4 LD T 164 B(N ), MT8LD264 B(N ), MT16LD464 B(N ) 1 ,2 ,4 M EG X 64 B U R S T EDO DRAM M O D U LES BURST EDO DRAM MODULE 1, 2, 4 MEG X 64 8, 16, 32 MEGABYTE, 3.3V, BURST EDO FEATURES PIN ASSIGNMENT (Front View) 168-Pin DIMM • 168-pin, dual-in-line memory module (D IM M )

MT4LC4M4G6

Contextual Info: PRELIMINARY MT4LC4IW4GS 4 M EG x4 BURSTEDO DRAM 4 MEG x 4 BURST EDO DRAM FEATURES PIN ASSIGNMENT Top View • Burst order, interleave or linear, programmed by executing WCBR cycle after initialization • Single power supply: +3.3V ±5% • All inputs and outputs are LVTTL compatible with 5V

m995

Abstract: 8F4DJ-52
Contextual Info: PRELIMINARY MT4LC2M8F4 2 MEG x 8 BURST EDO DRAM p ilC R C D N BURST EDO DRAM 2 MEG x 8 FEATURES PIN ASSIGNMENT Top View • Burst order, interleave or linear, program med by executing W CBR cycle after initialization • Single power supply: +3.3V ±5% • All inputs and outputs are LVTTL com patible with 5V

tc 97101

Contextual Info: ADVANCE MICRON I rtCHNCLOG * INC M714LD T 164 B(N), MT8LD264 B(N), MT16LD464 B(N) 1 , 2 , 4 MEG X 64 BURST EDO DRAM MODULES BURST EDO DRAM MODULE 1, 2, 4 MEG X 64 8, 16, 32 MEGABYTE, 3.3V, BURST EDO FEATURES • 168-pin, dual-in-line m em ory m od u e (DIM M )

T41C

Abstract: T41C-4M
Contextual Info: PRELIMINARY H/rT4LC4M4Gtff S M BK jc* BURST EDO DRAWT BURST EDO DRAM FEATURES • Burst order, interleave or linear, programmed by executing WCBR cycle after initialization • Single power supply: +3.3V ±5% • All inputs and outputs are LVTTL compatible with 5V