Untitled
Abstract: No abstract text available
Text: SAMSUNG S EM I C O N D U C T OR INC OH KS54AHCT -f f Q KS74AHCT ‘ U V Ï)ÉJ 7 U 4 1 M 2 0005^70 0 Dual J-K Positivé Edge-Triggered Flip-Flops with Preset and Clear “ “ — ' " T ~H t -on -on FEATURES DESCRIPTION • Function, pin-out, speed and drive compatibility with
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KS54AHCT
KS74AHCT
7Tb414S
90-XO
14-Pin
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signetics fast 74f273
Abstract: No abstract text available
Text: INTEGRATED CIRCUITS 74F273A Octal D flip-flop Product specification IC15 Data Handbook Philips Semiconductors 1996 Mar 12 Philips Semiconductors Product specification Octal D flip–flop 74F273A All outputs will be forced Low independently of Clock or Data inputs
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74F273A
74F273A
74F377A
74F373
74F374
74F273
signetics fast 74f273
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F374
Abstract: MC74FXXXDW F534 74f534
Text: M MOTOROLA MC54/74F534 OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS T h e M C 5 4 /7 4 F 5 3 4 is a h ig h -sp e e d , lo w -p o w e r o cta l D -typ e flip -flo p fe a tu rin g se p a ra te D -typ e in p u ts fo r e ach flip -flo p and 3 -sta te o u tp u ts fo r bus
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MC54/74F534
54/74F
F374
MC74FXXXDW
F534
74f534
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SLA 460
Abstract: No abstract text available
Text: * SY10E131 SY100E131 4-BIT D FLIP-FLOP SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES • 1100MHz min. toggle frequency ■ Extended 100E V ee range of -4.2V to -5.5V ■ Differential output ■ Individual and common clocks ■ Individual asynchronous reset ■ Paired asynchronous sets
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SY10E131
SY100E131
1100MHz
MC10E/100E131
SY10E131JC
SY10E131JCTR
SY10E131JI
SY10E131JITR
SY100E131
SLA 460
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74F273
Abstract: 74F273A 74F273AD 74F273AN 74F373 74F374 74F377A
Text: INTEGRATED CIRCUITS 74F273A Octal D flip-flop Product specification IC15 Data Handbook Philips Semiconductors 1996 Mar 12 Philips Semiconductors Product specification Octal D flip–flop 74F273A All outputs will be forced Low independently of Clock or Data inputs
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74F273A
74F377A
74F3to
74F273
74F273A
74F273AD
74F273AN
74F373
74F374
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PDF
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Untitled
Abstract: No abstract text available
Text: *SYNERGY SY10E131 SY100E131 4-BIT D FLIP-FLOP SEMICONDUCTOR FEATURES DESCRIPTION • 1100M Hz min. toggle frequency ■ Extended 100E V ee range of -4 .2 V to -5 .5 V ■ Differential output ■ Individual and common clocks ■ Individual asynchronous reset
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SY10E131
SY100E131
1100M
MC10E/100E131
J28-1
100E131JC
131JC
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Untitled
Abstract: No abstract text available
Text: -r MITSUBISHI ASTTLs . o^o^G M 74A S74P DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP FLO P WITH SET AND RESET DESCRIPTION The M74AS74P is a sem iconductor integrated circuit consisting of two D -type p o sitive -e d g e -trig g e re d flip flop circuits. Each of the circuits has independent inputs
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M74AS74P
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74F04
Abstract: 751A-02 MC74F1803
Text: MOTOROLA Order this document from Logic Marketing SEMICONDUCTOR TECHNICAL DATA Clock Driver Quad D-Type Flip-Flop MC74F1803 With Matched Propagation Delays The MC74F1803 is a high–speed, low–power, quad D–type flip–flop featuring separate D–type inputs and inverting outputs with closely matched
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MC74F1803
MC74F1803
BR1333
MC74F1803/D*
MC74F1803/D
74F04
751A-02
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Untitled
Abstract: No abstract text available
Text: ADVANCE INFORMATION SN54F534, SN74F534 OCTAL D-TYPE EDGE TRIGGERED FLIP FLOPS WITH 3 STATE OUTPUTS D 2 9 3 2 , M A R C H 1 9B7 • 3-State Bus-Driving Inverting Outputs • Buffered Control Inputs • Package Options Include Plastic "Sm all Outline" P ackages, Ceram ic Chip Carriers,
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SN54F534,
SN74F534
300-mil
54F534
74F534
54F534
74F534
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Untitled
Abstract: No abstract text available
Text: MOTOROLA MC54F374 MC74F374 OCTAL D-TYPE FLIP-FLOP With 3-S tate Outputs D E S C R IP T IO N — The M C 5 4 F /7 4 F 3 7 4 isa high-speed, low -pow er octal D -type flip -flo p fe a tu rin g separate D-type inputs for each flip flop and 3 -sta te o utp uts for bus oriented applications. A buffered
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MC54F374
MC74F374
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Untitled
Abstract: No abstract text available
Text: TYPES SN54AS821, SN54AS822, SN74AS821, SN74AS822 10 BIT BUS INTERFACE FLIP FLOPS WITH 3-STATE OUTPUTS D 2 8 2 5 , DECEMBER 1963 SN 54AS821 . . . J T PACKAGE SN 74A S821 . . . NT PACKAGE tO -B it Versions of 'A S 5 7 4 and 'A S 5 7 6 w ith Improved lo H Specifications
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SN54AS821,
SN54AS822,
SN74AS821,
SN74AS822
54AS821
SN54ASB21,
10-BIT
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Untitled
Abstract: No abstract text available
Text: M MOTOROLA MC54F/74F374 OCTAL D-TYPE FLIP-FLOP (With 3-Stata Outputs) DESCRIPTIÙN — The M C 5 4 F / 7 4 F 3 7 4 is a high-speed, low -pow er octal O -ty p e flip -flo p featu rin g separate O-type in p u ts for each flipflo p and 3 -state o u tp uts for bus oriented applications. A buffered
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MC54F/74F374
54/74F
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54HC374
Abstract: C374 74hc374
Text: SN54H C374, SN 74H C374 OCTAL D TYPE EDGE-TRIGGERED FLIP FLOPS WITH 3-STATE OUTPUTS _ P 2684, DEC EM BER 1 9 6 2 - R E V IS E D SEPTEM BER 1967 SN 54H C374 . . . J PACKAGE SN74HC374 DW OR N P A C K A G E 8 D -Type Fiip-Flops in a Single Package
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SN54H
300-mil
SN74HC374
SNS4HC374
2-42i
54HC374
C374
74hc374
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21 BU
Abstract: No abstract text available
Text: SN54AS821, SN54AS822, SN74AS821, SN74AS822 10-BIT BUS INTERFACE FLIP-FLOPS WITH 3 STATE OUTPUTS D 2 8 2 5 , DECEMBER 1 9 8 3 -R E V IS E D JA N U A R Y 1 9 8 6 S N 5 4 A S 8 2 1 . . J T PACKAGE S N 7 4 A S 8 2 1 . . . D W OR N T PACKAGE Functionally Equivalent to A M D 's A M 2 9 8 2 1
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SN54AS821,
SN54AS822,
SN74AS821,
SN74AS822
10-BIT
21 BU
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SF00297
Abstract: No abstract text available
Text: INTEGRATED CIRCUITS Next 74F173 Quad D-type flip-flop 3-State Product specification IC15 Data Handbook Philips Semiconductors 1990 Aug 31 Next Philips Semiconductors Product specification Quad D-type flip–flop (3-State) 74F173 Data inputs and clock enable inputs are fully edge–triggered
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74F173
74F173
N8T10
SF00297
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74F173
Abstract: N74F173D N74F173N N8T10
Text: INTEGRATED CIRCUITS 74F173 Quad D-type flip-flop 3-State Product specification IC15 Data Handbook Philips Semiconductors 1990 Aug 31 Philips Semiconductors Product specification Quad D-type flip–flop (3-State) 74F173 Data inputs and clock enable inputs are fully edge–triggered
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74F173
N8T10
74F173
N74F173D
N74F173N
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Q193
Abstract: lj11
Text: PRODUCT PREVIEW SN54AS29821, SN54AS29822, SN74AS29821, SN74AS29822 10-BIT BUS INTERFACE FLIP FLOPS WITH 3 STATE OUTPUTS D 2 8 2 5 , MAY 1986 Designed to be Interchangeable w ith A M D A M 2 9 8 2 1 and A M 2 9 8 2 2 SN 54A S29821 . . . JT PACKAGE SN 74A S29821 . . . DW OR NT PACKAGE
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SN54AS29821,
SN54AS29822,
SN74AS29821,
SN74AS29822
10-BIT
Q193
lj11
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PDF
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T flip flop pin configuration
Abstract: T flip flop IC M74LS273P M74LS273 20-PIN
Text: MITSUBISHI LSTTLs M74LS273P OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP FLOP WITH RESET DESCRIPTION The M 7 4L S 27 3P PIN CONFIGURATION TOP VIEW is a semiconductor integrated circuit containing 8 D -type positive edge-triggered flip -flo p circuits DIRECT RESET
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M74LS273P
M74LS273P
0013Sbl
14-PIN
16-PIN
20-PIN
T flip flop pin configuration
T flip flop IC
M74LS273
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Untitled
Abstract: No abstract text available
Text: 7 4 H C /H C T1 0 9 flip-flops DU AL JK FLIP-FLOP W ITH SET AND RESET; POSITIVE-EDGE TRIGGER FEATURES T Y P IC A L U N IT C O N D IT IO N S PARAM ETER SYM BO L HC HCT 15 12 12 17 14 15 ns ns ns tpHL^ tp L H propagation delay n C P to nQ , n Q n S p t o nQ , nQ
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T flip flop IC
Abstract: M74LS273P T flip flop pin configuration 20-PIN M74LS273 MITSUBISHI C
Text: MITSUBISHI LSTTLs M74LS273P OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP FLOP WITH RESET DESCRIPTION The M 7 4L S 27 3P PIN CONFIGURATION TOP VIEW is a semiconductor integrated circuit containing 8 D -type positive edge-triggered flip -flo p circuits DIRECT RESET
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M74LS273P
M74LS273P
b2LHfl27
0013Sbl
14-PIN
16-PIN
20-PIN
T flip flop IC
T flip flop pin configuration
M74LS273
MITSUBISHI C
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74F50109
Abstract: 74F50728 74F50729 74F5074 I74F50728D I74F50728N N74F50728D N74F50728N
Text: INTEGRATED CIRCUITS 74F50728 Synchronizing cascaded dual positive edge-triggered D-type flip-flop Positive specification IC15 Data Handbook Philips Semiconductors 1990 Sep 14 Philips Semiconductors Product specification Synchronizing cascaded dual positive
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74F50728
74F50728
74F5074
74F50109
74F50729
I74F50728D
I74F50728N
N74F50728D
N74F50728N
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SP 1191
Abstract: SN54F37
Text: ADVANCE INFORMATION SN S4F374, SN 74F374 OCTAL D-TYPE EDGE TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS D 2932, M A R C H 1987 SN54F374 . . . J PACKAGE • 8 D -Type Flip-Flops in a Single Package • 3-State Bus-Driving True Outputs • Full Parallel A c c e s s for Loading
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S4F374,
74F374
300-mil
SN54F374
SN54F374
SN74F374
SP 1191
SN54F37
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Untitled
Abstract: No abstract text available
Text: ATV2500B Features • High Performance, High Density Programmable Logic Device Typical 7 ns Pin-to-Pin Delay Fully Connected Logic Array With 416 Product Terms Flexible Output Macrocell 48 Flip-Flops - Two per Macrocell 72 Sum Terms All Flip-Flops, I/O Pins Feed In Independently
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ATV2500B
2500B
2500BL
ATV2500H/L
Military/883C
ATV2500BQL-25JC
ATV2500BQL-25KC
ATV2500BQL-25JI
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PDF
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Untitled
Abstract: No abstract text available
Text: CD4027A Types CMOS Dual J-K Master-Slave Flip-Flop The R CA-CD4027A is a single m o n o lith ic ch ip integrated c irc u it containing tw o iden tical com plem entary-sym m etry J-K masterslave flip-flo p s. Each flip -flo p has provisions fo r individual J, K, Set, Reset, and Clock in
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CD4027A
CA-CD4027A
D4027A
13--Dynamic
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