74F04
Abstract: 751A-02 MC74F1803
Text: MOTOROLA Order this document from Logic Marketing SEMICONDUCTOR TECHNICAL DATA Clock Driver Quad D-Type Flip-Flop MC74F1803 With Matched Propagation Delays The MC74F1803 is a high–speed, low–power, quad D–type flip–flop featuring separate D–type inputs and inverting outputs with closely matched
|
Original
|
MC74F1803
MC74F1803
BR1333
MC74F1803/D*
MC74F1803/D
74F04
751A-02
|
PDF
|
M74HC374
Abstract: DIP-20 M74HC374B1R M74HC374M1R M74HC374RM13TR M74HC374TTR flip flop
Text: M74HC374 OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT NON INVERTING • ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 90MHz TYP. at VCC = 6V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:
|
Original
|
M74HC374
90MHz
M74HC374
DIP-20
P001J
DIP-20
M74HC374B1R
M74HC374M1R
M74HC374RM13TR
M74HC374TTR
flip flop
|
PDF
|
DIP-20
Abstract: M74HCT534 M74HCT534B1R M74HCT534M1R M74HCT534RM13TR M74HCT534TTR
Text: M74HCT534 OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT INVERTING • ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 50MHz TYP. at VCC = 4.5V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX) SYMMETRICAL OUTPUT IMPEDANCE:
|
Original
|
M74HCT534
50MHz
M74HCT534
DIP-20
M74HCT534B1R
M74HCT534M1R
M74HCT534RM13TR
M74HCT534TTR
|
PDF
|
F374
Abstract: MC74FXXXDW F534 74f534
Text: M MOTOROLA MC54/74F534 OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS T h e M C 5 4 /7 4 F 5 3 4 is a h ig h -sp e e d , lo w -p o w e r o cta l D -typ e flip -flo p fe a tu rin g se p a ra te D -typ e in p u ts fo r e ach flip -flo p and 3 -sta te o u tp u ts fo r bus
|
OCR Scan
|
MC54/74F534
54/74F
F374
MC74FXXXDW
F534
74f534
|
PDF
|
Untitled
Abstract: No abstract text available
Text: *SYNERGY SY10E131 SY100E131 4-BIT D FLIP-FLOP SEMICONDUCTOR FEATURES DESCRIPTION • 1100M Hz min. toggle frequency ■ Extended 100E V ee range of -4 .2 V to -5 .5 V ■ Differential output ■ Individual and common clocks ■ Individual asynchronous reset
|
OCR Scan
|
SY10E131
SY100E131
1100M
MC10E/100E131
J28-1
100E131JC
131JC
|
PDF
|
Untitled
Abstract: No abstract text available
Text: -r MITSUBISHI ASTTLs . o^o^G M 74A S74P DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP FLO P WITH SET AND RESET DESCRIPTION The M74AS74P is a sem iconductor integrated circuit consisting of two D -type p o sitive -e d g e -trig g e re d flip flop circuits. Each of the circuits has independent inputs
|
OCR Scan
|
M74AS74P
|
PDF
|
Untitled
Abstract: No abstract text available
Text: ADVANCE INFORMATION SN54F534, SN74F534 OCTAL D-TYPE EDGE TRIGGERED FLIP FLOPS WITH 3 STATE OUTPUTS D 2 9 3 2 , M A R C H 1 9B7 • 3-State Bus-Driving Inverting Outputs • Buffered Control Inputs • Package Options Include Plastic "Sm all Outline" P ackages, Ceram ic Chip Carriers,
|
OCR Scan
|
SN54F534,
SN74F534
300-mil
54F534
74F534
54F534
74F534
|
PDF
|
Untitled
Abstract: No abstract text available
Text: TYPES SN54AS821, SN54AS822, SN74AS821, SN74AS822 10 BIT BUS INTERFACE FLIP FLOPS WITH 3-STATE OUTPUTS D 2 8 2 5 , DECEMBER 1963 SN 54AS821 . . . J T PACKAGE SN 74A S821 . . . NT PACKAGE tO -B it Versions of 'A S 5 7 4 and 'A S 5 7 6 w ith Improved lo H Specifications
|
OCR Scan
|
SN54AS821,
SN54AS822,
SN74AS821,
SN74AS822
54AS821
SN54ASB21,
10-BIT
|
PDF
|
54HC374
Abstract: C374 74hc374
Text: SN54H C374, SN 74H C374 OCTAL D TYPE EDGE-TRIGGERED FLIP FLOPS WITH 3-STATE OUTPUTS _ P 2684, DEC EM BER 1 9 6 2 - R E V IS E D SEPTEM BER 1967 SN 54H C374 . . . J PACKAGE SN74HC374 DW OR N P A C K A G E 8 D -Type Fiip-Flops in a Single Package
|
OCR Scan
|
SN54H
300-mil
SN74HC374
SNS4HC374
2-42i
54HC374
C374
74hc374
|
PDF
|
21 BU
Abstract: No abstract text available
Text: SN54AS821, SN54AS822, SN74AS821, SN74AS822 10-BIT BUS INTERFACE FLIP-FLOPS WITH 3 STATE OUTPUTS D 2 8 2 5 , DECEMBER 1 9 8 3 -R E V IS E D JA N U A R Y 1 9 8 6 S N 5 4 A S 8 2 1 . . J T PACKAGE S N 7 4 A S 8 2 1 . . . D W OR N T PACKAGE Functionally Equivalent to A M D 's A M 2 9 8 2 1
|
OCR Scan
|
SN54AS821,
SN54AS822,
SN74AS821,
SN74AS822
10-BIT
21 BU
|
PDF
|
Q193
Abstract: lj11
Text: PRODUCT PREVIEW SN54AS29821, SN54AS29822, SN74AS29821, SN74AS29822 10-BIT BUS INTERFACE FLIP FLOPS WITH 3 STATE OUTPUTS D 2 8 2 5 , MAY 1986 Designed to be Interchangeable w ith A M D A M 2 9 8 2 1 and A M 2 9 8 2 2 SN 54A S29821 . . . JT PACKAGE SN 74A S29821 . . . DW OR NT PACKAGE
|
OCR Scan
|
SN54AS29821,
SN54AS29822,
SN74AS29821,
SN74AS29822
10-BIT
Q193
lj11
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 7 4 H C /H C T1 0 9 flip-flops DU AL JK FLIP-FLOP W ITH SET AND RESET; POSITIVE-EDGE TRIGGER FEATURES T Y P IC A L U N IT C O N D IT IO N S PARAM ETER SYM BO L HC HCT 15 12 12 17 14 15 ns ns ns tpHL^ tp L H propagation delay n C P to nQ , n Q n S p t o nQ , nQ
|
OCR Scan
|
|
PDF
|
T flip flop IC
Abstract: M74LS273P T flip flop pin configuration 20-PIN M74LS273 MITSUBISHI C
Text: MITSUBISHI LSTTLs M74LS273P OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP FLOP WITH RESET DESCRIPTION The M 7 4L S 27 3P PIN CONFIGURATION TOP VIEW is a semiconductor integrated circuit containing 8 D -type positive edge-triggered flip -flo p circuits DIRECT RESET
|
OCR Scan
|
M74LS273P
M74LS273P
b2LHfl27
0013Sbl
14-PIN
16-PIN
20-PIN
T flip flop IC
T flip flop pin configuration
M74LS273
MITSUBISHI C
|
PDF
|
SP 1191
Abstract: SN54F37
Text: ADVANCE INFORMATION SN S4F374, SN 74F374 OCTAL D-TYPE EDGE TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS D 2932, M A R C H 1987 SN54F374 . . . J PACKAGE • 8 D -Type Flip-Flops in a Single Package • 3-State Bus-Driving True Outputs • Full Parallel A c c e s s for Loading
|
OCR Scan
|
S4F374,
74F374
300-mil
SN54F374
SN54F374
SN74F374
SP 1191
SN54F37
|
PDF
|
|
CD4027 application note
Abstract: cd4027 toggle RCA-CD4027A truth table of 4027 CD4027 applications 4027 CMOS Flip-Flop feme CD4027 rca vpg cd4013a
Text: CD4027A Types CMOS Dual J-K Master-Slave Flip-Flop The C D4027A is useful In perform ing con tro l, register, and toggle fun ctio ns. Logic levels present at the J and K inputs along w ith internal self-steering co ntro l th e state o f each flip -flo p ; changes in the flip -flo p
|
OCR Scan
|
CD4027A
RCA-CD4027A
RCA-CD4013A
C0402T
CCS-19099
CD4027 application note
cd4027 toggle
truth table of 4027
CD4027 applications
4027 CMOS Flip-Flop
feme
CD4027
rca vpg
cd4013a
|
PDF
|
4N19
Abstract: No abstract text available
Text: SN54F574, SN74F574 OCTAL D TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS D 3 0 3 4 , SEPTEMBER 1 9 8 7 -R E V IS E D JA N U A R Y 1989 8 D-Type Flip-Flops In a Single Package • 3-State Bus-Driving True Outputs • Full Parallel Access for Loading •
|
OCR Scan
|
SN54F574,
SN74F574
300-m
54F574
74F574
54F574
4N19
|
PDF
|
Untitled
Abstract: No abstract text available
Text: INTEGRATED CIRCUITS 74F273A Octal D flip-flop Product specification 1996 Mar 12 IC15 Data Handbook Philips Semiconductors PHILIPS Philips Semiconductors Product specification Octal D flip-flop 74F273A All outputs will be forced Low independently of Clock or Data inputs
|
OCR Scan
|
74F273A
74F273A
74F377A
74F373
74F374
|
PDF
|
MA116
Abstract: pin diagram of 74109
Text: SN54109, SN54LS109A, SN74109, SN74LS109A DUAL J K POSITIVE-EDGE-TRIGGERED FLIP FLOPS WITH PRESET AND CLEAR D ECEM BER 1983 - Package Options Include Plastic "Sm all O utline" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs S N 5 4 1 0 9 , S N 5 4 L S 1 0 9 A . . . J OR W PACKAGE
|
OCR Scan
|
SN54109,
SN54LS109A,
SN74109,
SN74LS109A
MA116
pin diagram of 74109
|
PDF
|
29825
Abstract: No abstract text available
Text: PRODUCT PREVIEW SN54AS29825, SN54AS29826, SN74AS29825, SN74AS29826 8-BIT BUS INTERFACE FLIP FLOPS WITH 3-STATE OUTPUTS D 2 8 2 5 , M AY 1986 • Designed to be Interchangeable with AMD's A M 29825 and AM 29826 • Improved lOH Specifications • Multiple Output Enables Allow Multiuser
|
OCR Scan
|
SN54AS29825,
SN54AS29826,
SN74AS29825,
SN74AS29826
54AS29825
29825
|
PDF
|
4HC574
Abstract: 54HC574
Text: SN54HC574, SN74HC574 OCTAL D-TYPE EDGE TRIGGERED FLIP FLOPS WITH 3-STATE OUTPUTS D 2 6 8 4 , DECEMBER 1 9 8 2 -R E V IS E D SEPTEMBER 1987 SN54HCB74 . . . J PACKAGE SN 74H C574 OW OR N PACKAGE High-Current 3-State Noninverting Outputs Drive Bus-Lines Directly or Up to 15 LSTTL
|
OCR Scan
|
SN54HC574,
SN74HC574
SN54HCB74
300-mil
4HC574
54HC574
|
PDF
|
SN54ALS273
Abstract: SN74ALS273
Text: SN54ALS273, SN74ALS273 OCTAL D TYPE FLIP FLOPS WITH CLEAR D 2 6 6 1 , A P R IL 1 9 8 2 - R E V I S E D M A Y 1 9 8 6 S N 5 4 A L S 2 7 3 . . . J PACKAGE S N 7 4 A L S 2 7 3 . . . D W OR N P AC KA G E C ontains Eight Flip-Flops w ith Single-Rail O utputs TO P VIEW
|
OCR Scan
|
SN54ALS273,
SN74ALS273
D2661,
1982-REVISED
300-mil
SN54ALS273
SN74ALS273
SN54ALS273
|
PDF
|
Untitled
Abstract: No abstract text available
Text: PRODUCT PREVIEW SN54ALS29823, SN54ALS29824 SN74ALS29823, SN74ALS29824 9 BIT BUS INTERFACE FLIP FLOPS WITH 3-STATE OUTPUTS D 28 25 , JA N U A R Y 1986 S N 5 4 A L S 2 9 8 2 3 . . . J T PACKAGE S N 7 4 A L S 2 9 8 2 3 . . . D W OR N T PACKAGE Functionally Equivalent to A M D 's A M 2 9 8 2 3
|
OCR Scan
|
SN54ALS29823,
SN54ALS29824
SN74ALS29823,
SN74ALS29824
|
PDF
|
gaas D flip flop
Abstract: No abstract text available
Text: TEKTRONIX INC/ TRI ÖUINT EbE D D ITRÖ ô'IGbElfl 00003^7 4 ' T ' i4 ' c - 0 1 - O ^ 10G023 10G023K [G lB ÎL J G ig a B it L o g ic Quad D Flip Flop with 2:1 Muxed Inputs 1.9 GHz Clock Rate 10G PicoLogic Family_ FEATURES * 850 ps typical clock to output delay
|
OCR Scan
|
10G023
10G023K
10G023K)
050P3
gaas D flip flop
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SN 54LS112A , S N 54S 112, SN 74LS112A , S N 74S 112A DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP FLOPS W ITH PRESET AND CLEAR D 2 6 6 1 . APRIL 1 9 8 2 - REVISED M A R C H 1 9 8 8 Fully Buffered to Offer Maximum Isolation from External Disturbance r a a SN 54LS 112A , SN 54S 112 . . . J OR W PACKAGE
|
OCR Scan
|
54LS112A
74LS112A
|
PDF
|