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    "SENSE AMPLIFIER" " CONTENT ADDRESSABLE MEMORIES " MATCH LINE Search Results

    "SENSE AMPLIFIER" " CONTENT ADDRESSABLE MEMORIES " MATCH LINE Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TC75S102F Toshiba Electronic Devices & Storage Corporation Operational Amplifier, 1.5V to 5.5V, I/O Rail to Rail, IDD=0.27μA, SOT-25 Visit Toshiba Electronic Devices & Storage Corporation
    TCTH022BE Toshiba Electronic Devices & Storage Corporation Over Temperature Detection IC / VDD=1.7~5.5V / IPTCO=10μA / IDD=11.3μA / Open-drain type / FLAG signal latch function Visit Toshiba Electronic Devices & Storage Corporation
    TCTH021BE Toshiba Electronic Devices & Storage Corporation Over Temperature Detection IC / VDD=1.7~5.5V / IPTCO=10μA / IDD=11.3μA / Open-drain type Visit Toshiba Electronic Devices & Storage Corporation
    74HC4053FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SPDT(1:2)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    XPQR8308QB Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 80 V, 350 A, 0.00083 Ω@10V, L-TOGL Visit Toshiba Electronic Devices & Storage Corporation

    "SENSE AMPLIFIER" " CONTENT ADDRESSABLE MEMORIES " MATCH LINE Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: PGA400-EP SLDS195B – MAY 2013 – REVISED FEBRUARY 2014 PRESSURE SENSOR SIGNAL CONDITIONER 1 DEVICE OVERVIEW 1.1 FEATURES 1 • Analog Features – Analog Front-End for Resistive Bridge Sensors – Self-Oscillating Demodulator for Capacitive Sensors – On-Chip Temperature Sensor


    Original     		PDF PGA400-EP SLDS195B 16-Bit, 10-Bit

    JB 2256 sensor

    Abstract: PGA400-EP OSC200
    Text: PGA400-EP www.ti.com SLDS195A – MAY 2013 – REVISED JUNE 2013 PRESSURE SENSOR SIGNAL CONDITIONER Check for Samples: PGA400-EP 1 DEVICE OVERVIEW 1.1 FEATURES 1 • Analog Features – Analog Front-End for Resistive Bridge Sensors – Self-Oscillating Demodulator for


    Original     		PDF PGA400-EP SLDS195A PVQFN-36 JB 2256 sensor PGA400-EP OSC200

    XAPP029

    Abstract: adc controller vhdl code verilog rtl code of Crossbar Switch 12-bit ADC interface vhdl code for FPGA vhdl code for pn sequence generator Insight Spartan-II demo board XAPP172 xilinx XC3000 SEU testing verilog hdl code for triple modular redundancy parallel to serial conversion vhdl IEEE paper
    Text: DataSource CD-ROM Q4-01 Xilinx Application Note Summaries XAPP004 Loadable Binary Counters The design strategies for loadable and non-loadable binary counters are significantly different. This application note discusses the differences, and describes the design of a loadable binary counter.


    Original     		PDF Q4-01 XAPP004 XAPP005 XC3000 Desi49 XC18V00, XC9500XL, XC9500XV, XAPP501 XC9500, XAPP029 adc controller vhdl code verilog rtl code of Crossbar Switch 12-bit ADC interface vhdl code for FPGA vhdl code for pn sequence generator Insight Spartan-II demo board XAPP172 xilinx XC3000 SEU testing verilog hdl code for triple modular redundancy parallel to serial conversion vhdl IEEE paper

    at89c51cc03 parallel programmer

    Abstract: at89c51cc03 code examples ccf um 80C51 AT89C51CC03 PLCC44 PLCC52 VQFP44 VQFP64 BIPOLAR MEMORY
    Text: Features • • • • 80C51 Core Architecture 256 Bytes of On-chip RAM 2048 Bytes of On-chip ERAM 64K Bytes of On-chip Flash Memory – Data Retention: 10 Years at 85°C – Read/Write Cycle: 100K • 2K Bytes of On-chip Flash for Bootloader • 2K Bytes of On-chip EEPROM


    Original     		PDF 80C51 14-sources 16-bit 80C51 4182O at89c51cc03 parallel programmer at89c51cc03 code examples ccf um AT89C51CC03 PLCC44 PLCC52 VQFP44 VQFP64 BIPOLAR MEMORY

    89C51CC03UA-UM

    Abstract: 89C51CC03UA atmel 89c51cc03ua AT89C51CC03UA-RLTUM AT89C51CC03CA-RLTUM AT89C51CC03UA-RDTUM AT89C51CC03UA-SLSUM at89c51cc03 parallel programmer AT89C51CC03C ccf um
    Text: Features • • • • 80C51 Core Architecture 256 Bytes of On-chip RAM 2048 Bytes of On-chip ERAM 64K Bytes of On-chip Flash Memory – Data Retention: 10 Years at 85°C – Read/Write Cycle: 100K • 2K Bytes of On-chip Flash for Bootloader • 2K Bytes of On-chip EEPROM


    Original     		PDF 80C51 14-sources 16-bit 80C51 4182I 89C51CC03UA-UM 89C51CC03UA atmel 89c51cc03ua AT89C51CC03UA-RLTUM AT89C51CC03CA-RLTUM AT89C51CC03UA-RDTUM AT89C51CC03UA-SLSUM at89c51cc03 parallel programmer AT89C51CC03C ccf um

    at89c51cc03 code examples

    Abstract: No abstract text available
    Text: Features • • • • 80C51 Core Architecture 256 Bytes of On-chip RAM 2048 Bytes of On-chip ERAM 64K Bytes of On-chip Flash Memory – Data Retention: 10 Years at 85°C – Read/Write Cycle: 100K • 2K Bytes of On-chip Flash for Bootloader • 2K Bytes of On-chip EEPROM


    Original     		PDF 80C51 14-sources 16-bit 80C51 4182Oâ at89c51cc03 code examples

    89C51CC03UA-um

    Abstract: 89C51CC03CA-UM at89c51cc03 parallel programmer AT89C51CC03UA-RDTUM AT89C51CC03UA-SLSUM 80C51 AT89C51CC03 PLCC44 PLCC52 VQFP44
    Text: Features • • • • 80C51 Core Architecture 256 Bytes of On-chip RAM 2048 Bytes of On-chip ERAM 64K Bytes of On-chip Flash Memory – Data Retention: 10 Years at 85°C – Read/Write Cycle: 100K • 2K Bytes of On-chip Flash for Bootloader • 2K Bytes of On-chip EEPROM


    Original     		PDF 80C51 14-sources 16-bit 80C51 4182L 89C51CC03UA-um 89C51CC03CA-UM at89c51cc03 parallel programmer AT89C51CC03UA-RDTUM AT89C51CC03UA-SLSUM AT89C51CC03 PLCC44 PLCC52 VQFP44

    89C51CC03CA-UM

    Abstract: AT89C51CC03CA-RDTUM at89c51cc03 code examples IDT20 89C51CC03UA-um
    Text: Features • • • • 80C51 Core Architecture 256 Bytes of On-chip RAM 2048 Bytes of On-chip ERAM 64K Bytes of On-chip Flash Memory – Data Retention: 10 Years at 85°C – Read/Write Cycle: 100K • 2K Bytes of On-chip Flash for Bootloader • 2K Bytes of On-chip EEPROM


    Original     		PDF 80C51 14-sources 16-bit 80C51 4182M 89C51CC03CA-UM AT89C51CC03CA-RDTUM at89c51cc03 code examples IDT20 89C51CC03UA-um

    Untitled

    Abstract: No abstract text available
    Text: Features • • • • 80C51 Core Architecture 256 Bytes of On-chip RAM 2048 Bytes of On-chip ERAM 64K Bytes of On-chip Flash Memory – Data Retention: 10 Years at 85°C – Read/Write Cycle: 100K • 2K Bytes of On-chip Flash for Bootloader • 2K Bytes of On-chip EEPROM


    Original     		PDF 80C51 14-sources 16-bit 80C51 4182Jâ

    89C51CC03UA

    Abstract: 89C51CC03CA-UM 89C51CC03UA-UM VQFP64 AT89C51CC03UA-RLTUM at89c51cc03 parallel programmer 80C51 AT89C51CC03 PLCC44 PLCC52
    Text: Features • • • • 80C51 Core Architecture 256 Bytes of On-chip RAM 2048 Bytes of On-chip ERAM 64K Bytes of On-chip Flash Memory – Data Retention: 10 Years at 85°C – Read/Write Cycle: 100K • 2K Bytes of On-chip Flash for Bootloader • 2K Bytes of On-chip EEPROM


    Original     		PDF 80C51 14-sources 16-bit 80C51 4182K 89C51CC03UA 89C51CC03CA-UM 89C51CC03UA-UM VQFP64 AT89C51CC03UA-RLTUM at89c51cc03 parallel programmer AT89C51CC03 PLCC44 PLCC52

    IDT20

    Abstract: at89c51cc03 code examples 4182H
    Text: Features • • • • 80C51 Core Architecture 256 Bytes of On-chip RAM 2048 Bytes of On-chip ERAM 64K Bytes of On-chip Flash Memory – Data Retention: 10 Years at 85°C – Read/Write Cycle: 100K • 2K Bytes of On-chip Flash for Bootloader • 2K Bytes of On-chip EEPROM


    Original     		PDF 80C51 14-sources 16-bit 80C51 4182H IDT20 at89c51cc03 code examples

    80C51

    Abstract: AT89C51CC03 PLCC44 PLCC52 VQFP44 VQFP64 4182N 89C51CC03CA-UM
    Text: Features • • • • 80C51 Core Architecture 256 Bytes of On-chip RAM 2048 Bytes of On-chip ERAM 64K Bytes of On-chip Flash Memory – Data Retention: 10 Years at 85°C – Read/Write Cycle: 100K • 2K Bytes of On-chip Flash for Bootloader • 2K Bytes of On-chip EEPROM


    Original     		PDF 80C51 14-sources 16-bit 80C51 4182N AT89C51CC03 PLCC44 PLCC52 VQFP44 VQFP64 89C51CC03CA-UM

    Untitled

    Abstract: No abstract text available
    Text: Features • • • • 80C51 Core Architecture 256 Bytes of On-chip RAM 2048 Bytes of On-chip ERAM 64K Bytes of On-chip Flash Memory – Data Retention: 10 Years at 85°C – Read/Write Cycle: 100K • 2K Bytes of On-chip Flash for Bootloader • 2K Bytes of On-chip EEPROM


    Original     		PDF 80C51 14-sources 16-bit 80C51 4182F

    80C51

    Abstract: AT89C51CC03 PLCC44 PLCC52 VQFP44 VQFP64 at89c51cc03 code examples AT89C51CC03C
    Text: Features • • • • 80C51 Core Architecture 256 Bytes of On-chip RAM 2048 Bytes of On-chip ERAM 64K Bytes of On-chip Flash Memory – Data Retention: 10 Years at 85°C – Read/Write Cycle: 100K • 2K Bytes of On-chip Flash for Bootloader • 2K Bytes of On-chip EEPROM


    Original     		PDF 80C51 14-sources 16-bit 80C51 4182G AT89C51CC03 PLCC44 PLCC52 VQFP44 VQFP64 at89c51cc03 code examples AT89C51CC03C

    SH7709S

    Abstract: 7709S Hitachi Capacitor Guide PD45128163G5-A10-9JF SH7622 SH7706 SH7709 SH7709A SH7727 SH7729
    Text: HITACHI EUROPE LTD. Version: App 128/1.0 APPLICATION NOTE SH3 -DSP Interface to SDRAM Introduction This application note has been written to aid designers connecting Synchronous Dynamic Random Access Memory (SDRAM) to the Bus State Controller (BSC) of SH7622 (SH2-DSP)


    Original     		PDF SH7622 SH7706, SH7709, SH7709A, SH7709S, SH7727, SH7729 SH7729R. 128-Mbit PD45128163G5-A10-9JF SH7709S 7709S Hitachi Capacitor Guide PD45128163G5-A10-9JF SH7622 SH7706 SH7709 SH7709A SH7727

    SH7709S

    Abstract: PD45128163G5-A10-9JF SH7622 SH7706 SH7709 SH7709A SH7727 SH7729 SH7729R "content addressable memory" power match precharge
    Text: To all our customers Information regarding change of names mentioned within this document, to Renesas Technology Corp. On April 1st 2003 the following semiconductor operations were transferred to Renesas Technology Corporation: operations covering microcomputer, logic,


    Original     		PDF SE-F080 32-bit/SH3 SH7709S PD45128163G5-A10-9JF SH7622 SH7706 SH7709 SH7709A SH7727 SH7729 SH7729R "content addressable memory" power match precharge

    ARM Cortex M4

    Abstract: cortex a15 core LPC4330 ARM Cortex A8 arm cortex a9 CE-ATA version 1.1 cortex a15 cpu cortex a15 cortex-m4 cortex a9
    Text: LPC4350/30/20/10 32-bit ARM Cortex-M4/M0 MCU; up to 264 kB SRAM; Ethernet; two High-speed USBs; advanced configurable peripherals Rev. 1 — 29 October 2010 Objective data sheet 1. General description The LPC4350/30/20/10 are ARM Cortex-M4 based microcontrollers for embedded


    Original     		PDF LPC4350/30/20/10 32-bit LPC4350/30/20/10 LPC4350 ARM Cortex M4 cortex a15 core LPC4330 ARM Cortex A8 arm cortex a9 CE-ATA version 1.1 cortex a15 cpu cortex a15 cortex-m4 cortex a9

    ARM CORTEX-M4

    Abstract: CE-ATA version 1.1 TFT16 BGA180
    Text: LPC4350/30/20/10 32-bit ARM Cortex-M4/M0 MCU; up to 264 kB SRAM; Ethernet; two High-speed USBs; advanced configurable peripherals Rev. 1 — 25 October 2010 Objective data sheet 1. General description The LPC4350/30/20/10 are ARM Cortex-M4 based microcontrollers for embedded


    Original     		PDF LPC4350/30/20/10 32-bit LPC4350/30/20/10 LPC4350 ARM CORTEX-M4 CE-ATA version 1.1 TFT16 BGA180

    LPC1850

    Abstract: LPC1830 voltage regulator 7133-1 ARM Cortex A8 p802i ARM Cortex M4 CE-ATA version 1.1 Cortex R4 LPC1830FET256 LPC18xx
    Text: LPC1850/30/20/10 32-bit ARM Cortex-M3 MCU; up to 200 kB SRAM; Ethernet, two High-speed USB, LCD, and external memory controller Rev. 1.2 — 17 February 2011 Objective data sheet 1. General description The LPC1850/30/20/10 are ARM Cortex-M3 based microcontrollers for embedded


    Original     		PDF LPC1850/30/20/10 32-bit LPC1850/30/20/10 LPC1850 LPC1830 voltage regulator 7133-1 ARM Cortex A8 p802i ARM Cortex M4 CE-ATA version 1.1 Cortex R4 LPC1830FET256 LPC18xx

    89C51CC01UA

    Abstract: 89C51CC01CA 89C51CC01UA-UM 89C51CC01 89C51CC01CA-UM 89C51CC01UA-IM VQFP44 80C51 AT89C51CC01 PLCC44
    Text: Features • • • • • • • • • • • • • • • • • • • • 1. 80C51 Core Architecture 256 Bytes of On-chip RAM 1K Bytes of On-chip XRAM 32K Bytes of On-chip Flash Memory – Data Retention: 10 Years at 85°C Erase/Write Cycle: 100K


    Original     		PDF 80C51 14-sources 16-bit 80C51 4129L 89C51CC01UA 89C51CC01CA 89C51CC01UA-UM 89C51CC01 89C51CC01CA-UM 89C51CC01UA-IM VQFP44 AT89C51CC01 PLCC44

    80C51

    Abstract: PLCC44 T89C51CC01 VQFP44
    Text: Features • • • • • • • • • • • • • • • • • • • • 1. 80C51 Core Architecture 256 Bytes of On-chip RAM 1K Bytes of On-chip XRAM 32K Bytes of On-chip Flash Memory – Data Retention: 10 Years at 85°C Erase/Write Cycle: 100K


    Original     		PDF 80C51 14-sources 16-bit 80C51 4129K PLCC44 T89C51CC01 VQFP44

    diode lt 8220

    Abstract: diode LT 8233 Monsanto segment display lt 8242 6e2 tube Signetics NE561B Signetics NE561 R/diode lt 8232 lt 8232
    Text: Copyright 1974 SIGNETICS CORPORATION Signetics C o rp o ra tio n reserves th e rig h t to m ake changes in th e pro d u c ts contained in th is b o o k in order to im prove design o r perform ance and to supp ly the best possible p ro d u c t. Signetics C o rp o ra tio n assumes no re sp o n s ib ility fo r the use o f any c irc u its described herein and


    OCR Scan     		PDF

    4 bit bcd adder using ic 7483

    Abstract: diode lt 8220 8T18+signetics
    Text: C op yrig h t 1 9 7 4 SIGNETICS CORPORATION Signetics Corporation reserves the right to make changes in the products contained in this book in order to improve design or performance and to supply the best possible product. Signetics Corporation assumes no responsibility fo r the use o f any circuits described herein and


    OCR Scan     		PDF

    Intel mcs-40

    Abstract: intel 1101 2116 ram 5101 RAM transistor equivalenti Bipolar PROM programming Creative IC CT 1975 intel 3601 1702a eprom MCS-40
    Text: PRIC E 15 00 memory design handbook m in ia i O k p a r » lio n 1 0 7 7 INTRODUCTION The Intel Memory Design Handbook contains information on the use of Intel’s memory components and support circuits in system application. It is intended to aid the system designer to gain a thorough


    OCR Scan     		PDF S-10380 CH-8021 /C-160/0577/50K Intel mcs-40 intel 1101 2116 ram 5101 RAM transistor equivalenti Bipolar PROM programming Creative IC CT 1975 intel 3601 1702a eprom MCS-40