"PROGRAMMABLE DELAY" I2C Search Results

dnr14d

Abstract: circuit diagram of 7.1 surround sound pin diagram 16x16 LED matrix display MR60 A835M 6sr5 MR601
Contextual Info: a High Quality 8-bit PAL/NTSC Video Encoder with six DAC outputs ADV7190 Preliminary Technical Data Programmable VBI Vertical Blanking Interval Programmable Sub-Carrier Frequency and Phase. Programmable LUMA Delay Programmable CHROMA Delay Programmable Gamma Correction

Contextual Info: a Digital 8-bit PAL/NTSC Video Encoder with six DAC outputs ADV7195 Preliminary Technical Data Programmable Sub-Carrier Frequency and Phase. Programmable LUMA Delay Programmable CHROMA Delay Programmable Gamma Correction Field Counter Multiple Programmable Luma Filters & Chroma Filters

CY23FP12

Contextual Info: CY23FP12 200 MHz Field Programmable Zero Delay Buffer 200 MHz Field Programmable Zero Delay Buffer Features Functional Description • Fully field-programmable ❐ Input and output dividers ❐ Inverting/non-inverting outputs ❐ Phase-locked loop PLL or fanout buffer configuration

IDT5T9820

Abstract: 5T9820
Contextual Info: IDT5T9820 EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL CLOCK DRIVER FEATURES: IDT5T9820 DESCRIPTION: • 2.5 VDD • 5 pairs of outputs • Low skew: 100ps all outputs at same interface level, 250ps all

5T9820

Contextual Info: IDT5T9820 EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL CLOCK DRIVER FEATURES: IDT5T9820 DESCRIPTION: • 2.5 VDD • 5 pairs of outputs • Low skew: 100ps all outputs at same interface level, 250ps all

AN237

Abstract: IDT5T9820 5T9820
Contextual Info: IDT5T9820 EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL CLOCK DRIVER IDT5T9820 FEATURES: DESCRIPTION: • 2.5 VDD • 5 pairs of outputs • Low skew: 100ps all outputs at same interface level, 250ps all

AN237

Abstract: IDT5T9821 VFQFP 5T9821
Contextual Info: IDT5T9821 EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL DIFFERENTIAL CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL DIFFERENTIAL CLOCK DRIVER IDT5T9821 FEATURES: DESCRIPTION: • 2.5 VDD • 6 pairs of outputs • Low skew: 100ps all outputs at same interface level, 250ps all

IDT5T9821

Abstract: 5T9821
Contextual Info: IDT5T9821 EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL DIFFERENTIAL CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL DIFFERENTIAL CLOCK DRIVER FEATURES: IDT5T9821 DESCRIPTION: • 2.5 VDD • 6 pairs of outputs • Low skew: 100ps all outputs at same interface level, 250ps all

5T9821

Contextual Info: IDT5T9821 EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL DIFFERENTIAL CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL DIFFERENTIAL CLOCK DRIVER FEATURES: IDT5T9821 DESCRIPTION: • 2.5 VDD • 6 pairs of outputs • Low skew: 100ps all outputs at same interface level, 250ps all

ispCLOCK5406D

Contextual Info: ispClock 5400D Family In-System Programmable, Ultra-Low Jitter Zero Delay and Fan-Out Buffer, Differential December 2011 Preliminary Data Sheet DS1025  Up to 10 Programmable Fan-out Buffers Features • Programmable differential output standards and

resistor MR25 philips

Abstract: philips MR25 transistor w04 adv7179 application note CGMS-A MR25 resistor w04 68 NTSC color bar generator w04 75 ADV7174
Contextual Info: a Chip Scale PAL/NTSC Video Encoder with Advanced Power Management ADV7174/ADV7179 Programmable VBI Vertical Blanking Interval Programmable Subcarrier Frequency and Phase Programmable LUMA Delay Individual ON/OFF Control of Each DAC CCIR and Square Pixel Operation

ispClock5410D

Abstract: UES23 DS1025 SSTL15 LVDS33 ispClock5406 ispCLOCK5406D SSTL-15 CLK5406
Contextual Info: ispClock 5400D Family In-System Programmable, Ultra-Low Jitter Zero Delay and Fan-Out Buffer, Differential November 2009 Preliminary Data Sheet DS1025  Up to 10 Programmable Fan-out Buffers Features • Programmable differential output standards and

ispCLOCK5406D

Contextual Info: ispClockTM 5400D Family In-System Programmable, Ultra-Low Jitter Zero Delay and Fan-Out Buffer, Differential May 2013 Data Sheet DS1025 Features  Up to 10 Programmable Fan-out Buffers CleanClock PLL • Programmable differential output standards and

CY23FP12

Contextual Info: CY23FP12-002 200 MHz Field Programmable Zero Delay Buffer Features Functional Description • Pre-programmed Configuration ■ Fully Field-Programmable ❐ Input and output dividers ❐ Inverting/noninverting outputs ❐ Phase-locked loop PLL or fanout buffer configuration

Contextual Info: DATA SHEET ICS1523 ICS1523 Video Clock Synthesizer with I2C 2 Programmable DelayVideo Clock Synthesizer with I C Programmable Delay General Description Features The ICS1523 is a low-cost, high-performance frequency generator. It is well suited to general purpose phase controlled clock synthesis as well as

CY23FP12

Abstract: CY23FP12-002 CY3692 CY23FP120
Contextual Info: CY23FP12-002 200-MHz Field Programmable Zero Delay Buffer Features Functional Description • Pre-programmed configuration ■ Fully field-programmable ❐ Input and output dividers ❐ Inverting/non inverting outputs ❐ Phase-locked loop PLL or fanout buffer configuration

CY23FP12

Contextual Info: CY23FP12 200 MHz Field Programmable Zero Delay Buffer Functional Description Features • Fully field-programmable ❐ Input and output dividers ❐ Inverting/noninverting outputs ❐ Phase-locked loop PLL or fanout buffer configuration ■ 10 MHz to 200 MHz operating range

CY23FP12

Abstract: CY23FP12OXC CY3692 ADP006
Contextual Info: CY23FP12 200 MHz Field Programmable Zero Delay Buffer Features Functional Description • Fully Field-Programmable ❐ Input and output dividers ❐ Inverting/noninverting outputs ❐ Phase-locked loop PLL or fanout buffer configuration ■ 10 MHz to 200 MHz Operating Range

CY23FP12

Abstract: CY23FP12OXC CY3692
Contextual Info: CY23FP12 200 MHz Field Programmable Zero Delay Buffer Features Functional Description • Fully field-programmable ❐ Input and output dividers ❐ Inverting/noninverting outputs ❐ Phase-locked loop PLL or fanout buffer configuration ■ 10 MHz to 200 MHz operating range

PG3000

Abstract: kitchen hood the lord of the dance AND CMOC gameboy flightcontrol PG3100
Contextual Info: PAGE 12 • MARCH 2005 FEATURE ARTICLE MICROWAVE PRODUCT DIGEST A Brief History of Programmable Oscillators New Programmables Take Bugs Outta Jitter, Delay Outta Delivery, and Send Heebie-Jeebies Back to Big Easy by Michael Adams Translation: They’re low jitter, plus they’re field programmable in five seconds, and even RE-programmable in five

euroscart

Abstract: ADV7174 CCIR-656 TC07 w04c mr4000
Contextual Info: Chip Scale PAL/NTSC Video Encoder with Advanced Power Management ADV7174/ADV7179 FEATURES Programmable subcarrier frequency and phase ITU-R1 BT601/BT656 YCrCb to PAL/NTSC video encoder Programmable LUMA delay High quality 10-bit video DACs Individual on/off control of each DAC

vision

Abstract: WINBOND W9953F W9954F CGMS
Contextual Info: W9953F/W9954F TV ENCODER • Master or slave operation modes GENERAL DESCRIPTION • Programmable sync polarity and horizontal phase • Programmable Y/C delay relationship The W9953F/ W9954F is a high performance digital video encoder which converts a 4:2:2 ITU-R 601/656

a68 w06

Contextual Info: Chip Scale PAL/NTSC Video Encoder with Advanced Power Management ADV7174/ADV7179 FEATURES Programmable subcarrier frequency and phase ITU-R1 BT601/BT656 YCrCb to PAL/NTSC video encoder Programmable LUMA delay High quality 10-bit video DACs Individual on/off control of each DAC

PAL 007 A

Abstract: adv7179 application note PAL 007 B MR25 PAL 007 PAL 007 c philips MR25 timing diagram for rgb CCIR-656 TC07
Contextual Info: Chip Scale PAL/NTSC Video Encoder with Advanced Power Management ADV7174/ADV7179 FEATURES Programmable subcarrier frequency and phase ITU-R1 BT601/BT656 YCrCb to PAL/NTSC video encoder Programmable LUMA delay High quality 10-bit video DACs Individual on/off control of each DAC